PF38F5070M0Y0T0 NUMONYX [Numonyx B.V], PF38F5070M0Y0T0 Datasheet - Page 38

• Manufacturer Part Number: PF38F5070M0Y0T0
• Description: Numonyx StrataFlash Wireless Memory
• Manufacturer: NUMONYX [Numonyx B.V]

Table 17: Command Bus Cycles
9.3
Datasheet
38
Notes:
1.
2.
3.
4.
Configuration
Protection
Unlocking
Locking/
Program
Suspend
Erase
Block
Mode
Read
First command cycle address should be the same as the operation’s target address.
PnA = Address within the partition.
PBA = Partition base address.
IA = Identification code address offset.
QA = CFI Query address offset.
BA = Address within the block.
WA = Word address of memory location to be written.
PRA = Protection Register address.
LRA = Lock Register address.
X = Any valid address within the device.
ID = Identifier data.
QD = Query data on AD[15:0].
SRD = Status Register data.
WD = Word data.
N = Word count of data to be loaded into the write buffer.
PD = Protection Register data.
PD = Protection Register data.
LRD = Lock Register data.
RCD = Read Configuration Register data on A[15:0]. A[MAX:16] can select any partition.
The second cycle of the Write-to-Buffer command is the word count of the data to be loaded into the write buffer. This is
followed by up to 32 words of data.Then the confirm command (0xD0) is issued, triggering the array programming
operation.
The confirm command (0xD0) is followed by the buffer data.
Read Array
Read Device Identifier
CFI Query
Read Status Register
Clear Status Register
Word Program
Buffered Program
Buffered Enhanced Factory Program
(Buffered EFP)
Block Erase
Program/Erase Suspend
Program/Erase Resume
Lock Block
Unlock Block
Lock-down Block
Program Protection Register
Program Lock Register
Program Read Configuration Register
Command Definitions
Table 18
shows valid device command codes and descriptions.
Command
Cycles
Bus
≥ 2
≥ 2
> 2
> 2
1
2
1
2
2
1
1
2
2
2
2
2
2
Numonyx™ StrataFlash
Oper
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
First Bus Cycle
Addr
PRA
LRA
RCD
PnA
PnA
PnA
PnA
WA
WA
WA
BA
BA
BA
BA
X
X
X
0x40/
Data
0xD0
0xC0
0xC0
0x90
0x98
0x70
0x50
0x10
0xE8
0x80
0x20
0xB0
0x60
0x60
0x60
0x60
0xFF
®
Oper
Write
Write
Write
Write
Write
Write
Write
Write
Write
Write
Read
Read
Read
Wireless Memory (L18 AD-Mux)
Second Bus Cycle
PRA
LRA
PnA+QA
PBA+IA
Order Number: 313295-04
Addr
RCD
PnA
WA
WA
WA
BA
BA
BA
BA
PD
LRD
Data
0xD0
0xD0
0xD0
November 2007
N - 1
0x01
0x2F
0x03
SRD
WD
QD
ID
Note
1,2,3
1,2,4
1,2
1,2
s