APA075-BGB ACTEL [Actel Corporation], APA075-BGB Datasheet - Page 167

• Manufacturer Part Number: APA075-BGB
• Description: ProASIC Flash Family FPGAs
• Manufacturer: ACTEL [Actel Corporation]

Previous version
v3.5
v3.4
v3.3
v3.2
v3.1
v3.0
The ProASIC
document now supports Commercial, Industrial, and Military Temperature devices.
Table 1
The
"Plastic Device Resources" table
The Long Term Jitter Peak-to-Peak Max. in the
The
"Performance Retention" section
Table 1-18
Table 1-20
Table 1-21
Table 1-22
Table 1-46
The
The
The
The
The
The
The
Table 1-15
The
The
The
Pin 15 = GLMX1
Pin 16 = GL1
Pin 21 = GL2
Pin 88 = GL3
Pin93 = GL4
Pin 94 = GLMX2
The
Figure 1-14
Table 1-7
Figure 1-20
The
Figure 1-26
In the
The
The
The datasheet was updated to include references to guidelines concerning the use of certain
ProASIC
In
Figure 1-8
The V
In the
In the
and the –F maximum changed to 0.8.
Changes in current version (v5.7)
Table 1-2 on page
"Ordering Information" section
"Calculating Typical Power Dissipation" section
"Temperature Grade Offerings" table
"Speed Grade and Temperature Matrix" table
"ProASICPLUS Clock Management System" section
"Lock Signal" section
"PLL Electrical Specifications" table
"User Security" section
"Design Environment" section
"Asynchronous FIFO Full and Empty Transitions" section
"AVDD PLL Power Supply" section
"144-Pin TQFP" table on page 2-4
"ProASICPLUS Clock Management System" section
"PLL Electrical Specifications" section
"Programming, Storage, and Operating Limits" section
"Recommended Design Practice for VPN/VPP" section
IL
"Calculating Typical Power Dissipation"
"Output Buffer Delays"
"Sample Macrocell Library Listing"
was updated.
Minimum in the
PLUS
is new.
was updated.
was updated.
was updated.
was updated.
was updated.
was updated.
was updated.
was updated.
was updated.
I/O standards.
PLUS
and ProASIC
1-8, the Memory Rows – Bottom coordinates were changed.
Table 1-22
was updated.
was updated.
section, the OB25LPLL t
was updated.
PLUS
was updated.
was changed from 0.3 to –0.3.
was updated.
Military/Aerospace datasheets were combined. This
in the
was updated.
was updated. The following pins changed:
section, the AND2 Standard maximum changed to 0.7
was updated.
is new.
v5.7
"Pin Description" section
"PLL Electrical Specifications" table
section, P9 was changed to 7.5 mW.
is new.
was updated.
DHL
was updated.
was updated.
Standard changed to 5.3.
was updated.
was updated.
was updated.
was updated.
ProASIC
was updated.
PLUS
Flash Family FPGAs
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