APA075-BGB ACTEL [Actel Corporation], APA075-BGB Datasheet - Page 56
![no-image](/images/no-image-200.jpg)
APA075-BGB
Manufacturer Part Number
APA075-BGB
Description
ProASIC Flash Family FPGAs
Manufacturer
ACTEL [Actel Corporation]
Datasheet
1.APA075-BGB.pdf
(174 pages)
- Current page: 56 of 174
- Download datasheet (5Mb)
Predicted Global Routing Delay
Table 1-41 • Worst-Case Commercial Conditions
Table 1-42 • Worst-Case Military Conditions
Global Routing Skew
Table 1-43 • Worst-Case Commercial Conditions
Table 1-44 • Worst-Case Commercial Conditions
1 -5 0
Parameter
t
t
t
t
Notes:
1. The timing delay difference between tile locations is less than 15ps.
2. All –F parts are only available as commercial.
3. Highly loaded row 50%.
4. Minimally loaded row.
Parameter
t
t
t
t
Note: * The timing delay difference between tile locations is less than 15 ps.
Parameter
t
t
Note: *All –F parts are only available as commercial.
Parameter
t
t
RCKH
RCKL
RCKH
RCKL
RCKH
RCKL
RCKH
RCKL
RCKSWH
RCKSHH
RCKSWH
RCKSHH
ProASIC
PLUS
V
V
V
V
DDP
DDP
DDP
DDP
Flash Family FPGAs
= 3.0 V, V
= 3.0V, V
= 3.0 V, V
= 3.0V, V
Input Low to High
Input High to Low
Input Low to High
Input High to Low
Description
Input Low to High (high loaded row of 50%)
Input High to Low (high loaded row of 50%)
Input Low to High (minimally loaded row)
Input High to Low (minimally loaded row)
Maximum Skew Low to High
Maximum Skew High to Low
Maximum Skew Low to High
Maximum Skew High to Low
DD
DD
DD
DD
= 2.3V, T
= 2.3V, T
= 2.3 V, T
= 2.3 V, T
3
3
4
4
Description
J
J
J
= 125°C for Military/MIL-STD-883
J
= 125°C for Military/MIL-STD-883
= 70°C
= 70°C
Description
Description
1
v5.7
Std.
1.1
1.0
0.8
0.8
Max.
Max.
Std.
270
270
1.1
1.0
0.8
0.8
Max.
270
270
–F
1.3
1.2
1.0
1.0
Max.
2
320
320
–F*
Units
Units
Units
ns
ns
ns
ns
ps
ps
ns
ns
ns
ns
Units
ps
ps
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