DS80C320-ECD DALLAS [Dallas Semiconductor], DS80C320-ECD Datasheet - Page 106

• Manufacturer Part Number: DS80C320-ECD
• Description: High-Speed Microcontroller User Guide
• Manufacturer: DALLAS [Dallas Semiconductor]

NO-BATTERY RESET
The battery backup feature of the DS87C530 introduces a new type of reset condition. Most SFR bits are
automatically reset to their default state upon a power-on reset. The external backup battery feature
makes some bits non-volatile, however, and these battery-backed bits will not change state when a power-
on reset is applied. Upon the loss or initial connection of battery power these bits will default to the state
shown in Table 8-1. Any bits not listed below are either unchanged or set to their default state by a
power-on reset.
NO–BATTERY RESET DEFAULT Table 8-1
IN-SYSTEM DISABLE MODE
The High-Speed Microcontroller Family supports in-circuit debugging of designs. The In-System Disable
(ISD) feature allows the device to be tristated for in-circuit emulation or board testing. During ISD mode,
the device pins will take on the following states:
The following procedure is used to enter ISD mode:
1. Assert reset by pulling RST high,
2. Pull ALE low and pull PSEN high,
3. Verify that P2.7, P2.6, P2.5 are not being driven low,
4. Release RST,
5. Hold ALE low and PSEN high for at least 2 machine cycles,
6. Device is now in ISD mode. Release ALE and PSEN if desired.
Note that pins P2.7, P2.6, P2.5 should not be driven low when RST is released. This will place the device
into a reserved test mode. Because these pins have a weak pull-up during reset, they can be left floating.
The test mode is only sampled on the falling edge of RST, and once RST is released their state will not
effect device operation. In a similar manner, the
invoked, and their state will not effect device operation. The RST pin will also be in a tristate mode, but
asserting it in ISD mode will return the device to normal operation.
E4K
X12/6
TRM2
TRM2
TRM1
TRM1
TRM0
TRM0
RTASS.7–0
RTAS.7–0
RTAM.7–0
RTAH.7–0
DEVICE PIN
Port 0, 1, 2, 3 RST, EA
ALE, PSEN
XTAL1, XTAL2
BIT NAME
TRIM.7
TRIM.6
TRIM.5
TRIM.4
TRIM.3
TRIM.2
TRIM.1
TRIM.0
RTASS.7–0
RTAS.7–0
RTAM.7–0
RTAH.7–0
LOCATION
STATE DURING ISD
True Tristate
Weak Pullup (~10KO)
Oscillator remains active
0
1
1
0
0
1
0
1
Indeterminate
Indeterminate
Indeterminate
Indeterminate
NO-BATTERY
RESET
STATE
106 of 175
PSEN
SSCE
SCE
MCE
HCE
RTCIF
RTCE
RTCSS.7–0
RTCS.7–0
RTCM.7–0
RTCH.7–0
RTCD0.7–0
RTCD1.7–0
BIT NAME
and RST pins can be released once ISD mode is
RTCC.7
RTCC.6
RTCC.5
RTCC.4
RTCC.1
RTCC.0
RTCSS.7–0
RTCS.7–0
RTCM.7–0
RTCH.7–0
RTCD1.7–0
RTCD1.7–0
High-Speed Microcontroller User’s Guide
LOCATION
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
Indeterminate
NO-BATTERY
RESET
STATE