DS80C320-ECD DALLAS [Dallas Semiconductor], DS80C320-ECD Datasheet - Page 31

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DS80C320-ECD

Manufacturer Part Number
DS80C320-ECD
Description
High-Speed Microcontroller User Guide
Manufacturer
DALLAS [Dallas Semiconductor]
Datasheet
Serial Port 0 Control (SCON0)
SFR 98h
SM0-2
Bits 7-5
SM0/FE_0
Bit 7
SM1_0
Bit 6
SM2_0
Bit 5
SM0
0
0
0
1
1
1
1
SM1
0
0
1
0
0
1
1
R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset
SM0/FE_0
RW-0
SM2
X
0
1
0
1
0
1
7
MODE
Serial Port Mode These bits control the mode of serial port 0. In addition the
SM0 and SM2_0 bits have secondary functions as shown below.
Framing Error Flag. When SMOD0 (PCON.6)=0, this bit (SM0) is used to
select the mode for serial port 0. When SMOD0 (PCON.6)=1, this bit (FE) will
be set upon detection of an invalid stop bit. When used as FE, this bit must be
cleared in software. Once the SMOD0 bit is set, modifications to this bit will not
affect the serial port mode settings. Although accessed from the same register,
internally the data for bits SM0 and FE are stored in different locations.
No alternate function.
Multiple CPU Communications. The function of this bit is dependent on the
serial port 0 mode.
Mode 0: Selects 12 t
transfers.
Mode 1: When set, reception is ignored (RI_0 is not set) if invalid stop bit
received.
Mode 2/3: When this bit is set, multiprocessor communications are enabled in
modes 2 and 3. This will prevent the RI_0 bit from being set, and an interrupt
being asserted, if the 9
0
0
1
2
1
3
3
SM1_0
RW-0
6
Synchronous
Synchronous
Asynchronous
Asynchronous
Asynchronous w/ Multiprocessor
communication
Asynchronous
Asynchronous w/ Multiprocessor
communication
SM2_0
RW-0
FUNCTION
5
CLK
th
or 4 t
31 of 175
bit received is not 1.
REN_0
RW-0
4
CLK
period for synchronous serial port 0 data
TB8_0
RW-0
LENGTH
3
10 bits
11 bits
11 bits
11 bits
11 bits
8 bits
8 bits
High-Speed Microcontroller User’s Guide
RB8_0
RW-0
12 t
4 t
Timer 1 or 2 baud rate equation
64 t
32 t
64 t
32 t
Timer 1 or 2 baud rate equation
Timer 1 or 2 baud rate equation
2
CLK
CLK
CLK
CLK
CLK
CLK
(SMOD=0)
(SMOD=1)
(SMOD=0)
(SMOD=1)
RW-0
PERIOD
T1_0
1
RW-0
R1_0
0

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