DS80C320-ECD DALLAS [Dallas Semiconductor], DS80C320-ECD Datasheet - Page 93
DS80C320-ECD
Manufacturer Part Number
DS80C320-ECD
Description
High-Speed Microcontroller User Guide
Manufacturer
DALLAS [Dallas Semiconductor]
Datasheet
1.DS80C320-ECD.pdf
(175 pages)
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POWER CYCLE OPERATION Figure 7-1
WATCHDOG WAKE UP
The Watchdog Wake up is more of an application than a feature. It allows a system to enter the Idle
mode for power savings, then to wake up periodically to sample the external world. Idle mode is a low
power state described below. Any of the programmable timers can perform this function, but the
Watchdog allows a much longer period to be selected. At 12 MHz, the maximum Watchdog time-out is
over 5.5 seconds. This contrasts with 0.78 seconds using the 16-bit timers. Software that uses the
Watchdog as a wake up alarm should only enable the Watchdog Interrupt and not the Reset. Note that the
Watchdog cannot be used to wake the system while in Stop mode since no clocks are running. Stop mode
is described below.
POWER MANAGEMENT SUMMARY
The following is a summary of the power management bits and those that are useful or related. They are
contained in the register locations WDCON;D8h, EIE;E8h, EXIF;91h, and PCON; 87h.
WDCON.6 POR - Power on Reset. Hardware will set this bit on a power up condition. Software can
read it, but must clear it manually. This bit assists software in determining the cause of a reset.
WDCON.5 EPFI - Enable Power-fail Interrupt. Setting this bit to 1 enables the Power-fail interrupt.
This will occur when V
Setting this bit to a 0 turns off the Power-fail Interrupt.
WDCON.4 PFI - Power Fail Interrupt Flag. Hardware will set this bit to a 1 when a Power-fail condition
occurs. Software must clear the bit manually. Writing a 1 to this bit will force an interrupt, if enabled.
WDCON.3 WDIF - Watchdog Interrupt Flag. If the Watchdog Interrupt is enabled (EIE.4), hardware
will set this bit to indicate that the Watchdog Interrupt has occurred. If the interrupt is not enabled, this
bit indicates that the time-out has passed. If the Watchdog Reset is enabled (WDCON.1), the user has
512 clocks to strobe the Watchdog prior to a reset. Software or any reset can
clear this flag.
XTAL1
INTERNAL RESET
V
V
INTERRUPT
SERVICE ROUTINE
V
V
PFW
RST
CC
SS
CC
drops to approximately 4.5 volts, and the processor vectors to location 33h.
93 of 175
High-Speed Microcontroller User’s Guide
t
CSU
t
POR
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