ADSP-BF537 AD [Analog Devices], ADSP-BF537 Datasheet - Page 53

• Manufacturer Part Number: ADSP-BF537
• Description: Blackfin Embedded Processor
• Manufacturer: AD [Analog Devices]

POWER DISSIPATION
Total power dissipation has two components: one due to inter-
nal circuitry (P
output drivers (P
internal circuitry (V
Table 40. Internal Power Dissipation
1
2
3
4
5
The external component of total power dissipation is caused by
the switching of output pins. Its magnitude depends on:
Furthermore, because I/O activity is usually not constant over
time, the external component of power dissipation is not a con-
stant value. Its peak value is best estimated by identifying
representative phases with the highest I/O activity and analyz-
ing output switching pin by pin. The following formula
calculates the average power for an analyzed period by accumu-
lating the power of all output pins.
Parameter
I
I
I
I
I
Parameter
I
I
I
I
I
Parameter
I
I
I
I
I
I
Processor executing 75% dual MAC, 25% ADD with moderate data bus activity.
See the ADSP-BF537 Blackfin Processor Hardware Reference Manual for definitions of sleep and deep sleep operating modes.
I
Measured at V
DDTYP
DDSLEEP
DDDEEPSLEEP
DDHIBERNATE
DDRTC
DDTYP
DDSLEEP
DDDEEPSLEEP
DDHIBERNATE
DDRTC
DDTYP
DDSLEEP
DDDEEPSLEEP
DDHIBERNATE
DDRTC
DD
DDHIBERNATE
• The output voltage swing (V
• The output capacitance (C
• The maximum frequency (f
data is specified for typical process parameters. All data at 25 C.
2
5
2
5
2
5
switch.
3, 4
3, 4
3, 4
3
4
3
4
3
4
is measured @ V
DDRTC
INT
) and one due to the switching of external
EXT
= 3.3 V at 25 C.
P
EXT
).
DDINT
Table 40
Test Conditions
f
V
26
16
14
50
30
f
V
65
16
14
50
30
f
V
220
37
31
50
30
=
).
DDEXT
CCLK
CCLK
CCLK
DDINT
DDINT
DDINT
V
DDEXT
= 50 MHz
= 250 MHz
= 600 MHz
= 3.65 V with the core voltage regulator off (V
= 0.8 V
=0.8 V
=1.2 V
shows the power dissipation for
0
) individual pins have to load.
0
) at which individual pins
DDEXT
2
∑
).
1
C
0
f
0
Rev. B | Page 53 of 68 | July 2006
f
V
130
30
25
50
30
f
V
190
37
31
50
30
CCLK
CCLK
DDINT
DDINT
= 400 MHz
= 500 MHz
=1.0 V
=1.2 V
DDINT
= 0 V).
Many operating conditions can affect power dissipation. System
designers should refer to EE-297: Estimating Power for the
ADSP-BF534/BF536/BF537 Blackfin Processors.” This document
will provide detailed information for optimizing your design for
lowest power.
The frequency f includes driving the load high and then back
low. For example: DATA15–0 pins can drive high and low at a
maximum rate of 1 (2 t
A typical power consumption can now be calculated for these
conditions by adding a typical internal power dissipation:
Note that the conditions causing a worst-case P
those causing a worst-case P
while 100% of the output pins are switching from all ones (1s) to
all zeros (0s). Note, as well, that it is uncommon for an applica-
tion to have 100% or even 50% of the outputs switching
simultaneously.
ADSP-BF534/ADSP-BF536/ADSP-BF537
P
f
V
160
37
31
50
30
TOTAL
CCLK
DDINT
= 400 MHz
=1.2 V
=
SCLK
P
EXT
INT
) while in SDRAM burst mode.
. Maximum P
+
I
DD
V
DDINT
INT
EXT
cannot occur
Unit
mA
mA
mA
Unit
mA
mA
mA
Unit
mA
mA
mA
A
A
A
A
A
A
differ from