MC68HC08AZ60CFU MOTOROLA [Motorola, Inc], MC68HC08AZ60CFU Datasheet - Page 206
MC68HC08AZ60CFU
Manufacturer Part Number
MC68HC08AZ60CFU
Description
Advance Information
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC08AZ60CFU.pdf
(452 pages)
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Serial Communications Interface Module (SCI)
SCI Status
Register 2
MC68HC08AZ60 — Rev 1.0
206
Address:
NF — Receiver Noise Flag Bit
FE — Receiver Framing Error Bit
PE — Receiver Parity Error Bit
SCI status register 2 contains flags to signal the following conditions:
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
This clearable, read-only bit is set when the SCI detects noise on the
RxD pin. NF generates an NF CPU interrupt request if the NEIE bit in
SCC3 is also set. Clear the NF bit by reading SCS1 and then reading
the SCDR. Reset clears the NF bit.
This clearable, read-only bit is set when a logic 0 is accepted as the
stop bit. FE generates an SCI error CPU interrupt request if the FEIE
bit in SCC3 also is set. Clear the FE bit by reading SCS1 with FE set
and then reading the SCDR. Reset clears the FE bit.
This clearable, read-only bit is set when the SCI detects a parity error
in incoming data. PE generates a PE CPU interrupt request if the
PEIE bit in SCC3 is also set. Clear the PE bit by reading SCS1 with
PE set and then reading the SCDR. Reset clears the PE bit.
•
•
Serial Communications Interface Module (SCI)
For More Information On This Product,
1 = Noise detected
0 = No noise detected
1 = Framing error detected
0 = No framing error detected
1 = Parity error detected
0 = No parity error detected
Break character detected
Incoming data
$0017
Bit 7
0
Go to: www.freescale.com
Figure 16. SCI Status Register 2 (SCS2)
= Unimplemented
6
0
5
0
4
0
3
0
2
0
BKF
1
0
MOTOROLA
Bit 0
RPF
0
34-sci
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