MC68HC08AZ60CFU MOTOROLA [Motorola, Inc], MC68HC08AZ60CFU Datasheet - Page 338
MC68HC08AZ60CFU
Manufacturer Part Number
MC68HC08AZ60CFU
Description
Advance Information
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC08AZ60CFU.pdf
(452 pages)
- Current page: 338 of 452
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MSCAN Controller (MSCAN08)
MSCAN08 Module
Control Register 1
MC68HC08AZ60 — Rev 1.0
338
Address:
SLPRQ — Sleep Request, Go to Internal Sleep Mode
SFTRES — Soft Reset
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
This flag requests the MSCAN08 to go into an internal power-saving
mode (see
When this bit is set by the CPU, the MSCAN08 immediately enters the
soft reset state. Any ongoing transmission or reception is aborted and
synchronization to the bus is lost.
The following registers enter and stay in their hard reset state:
CMCR0, CRFLG, CRIER, CTFLG, and CTCR.
The registers CMCR1, CBTR0, CBTR1, CIDAC, CIDAR0–3, and
CIDMR0–3 can only be written by the CPU when the MSCAN08 is in
soft reset state. The values of the error counters are not affected by
soft reset.
When this bit is cleared by the CPU, the MSCAN08 tries to
synchronize to the CAN bus. If the MSCAN08 is not in bus-off state,
it will be synchronized after 11 recessive bits on the bus; if the
MSCAN08 is in bus-off state, it continues to wait for 128 occurrences
of 11 recessive bits.
Clearing SFTRES and writing to other bits in CMCR0 must be in
separate instructions.
For More Information On This Product,
1 = Sleep — The MSCAN08 will go into internal sleep mode.
0 = Wakeup — The MSCAN08 will function normally.
1 = MSCAN08 in soft reset state
0 = Normal operation
$0501
Bit 7
0
0
MSCAN Controller (MSCAN08)
Figure 16. Module Control Register (CMCR1)
Go to: www.freescale.com
MSCAN08 Sleep Mode
= Unimplemented
6
0
0
5
0
0
4
0
0
on page 321).
3
0
0
LOOPB
2
0
WUPM
1
0
MOTOROLA
CLKSRC
34-mscan
Bit 0
0
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