MC68HC08AZ60CFU MOTOROLA [Motorola, Inc], MC68HC08AZ60CFU Datasheet - Page 216
MC68HC08AZ60CFU
Manufacturer Part Number
MC68HC08AZ60CFU
Description
Advance Information
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC08AZ60CFU.pdf
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Serial Peripheral Interface Module (SPI)
MC68HC08AZ60 — Rev 1.0
216
Master Mode
NOTE:
SHIFT REGISTER
GENERATOR
MASTER MCU
BAUD RATE
Figure 2. Full-Duplex Master-Slave Connections
The SPI operates in master mode when the SPI master bit, SPMSTR
(SPCR $0010), is set.
Configure the SPI modules as master and slave before enabling them.
Enable the master SPI before enabling the slave SPI. Disable the slave
SPI before disabling the master SPI. See
236.
Only a master SPI module can initiate transmissions. Software begins
the transmission from a master SPI module by writing to the SPI data
register. If the shift register is empty, the byte immediately transfers to
the shift register, setting the SPI transmitter empty bit, SPTE (SPSCR
$0011). The byte begins shifting out on the MOSI pin under the control
of the serial clock. (See
The SPR1 and SPR0 bits control the baud rate generator and determine
the speed of the shift register. (See
on page 238). Through the SPSCK pin, the baud rate generator of the
master also controls the shift register of the slave peripheral.
Freescale Semiconductor, Inc.
For More Information On This Product,
Serial Peripheral Interface Module (SPI)
MISO
MOSI
SPSCK
SS
Go to: www.freescale.com
V
Table
DD
4).
SPSCK
MISO
MOSI
SPI Status and Control Register
SS
SPI Control Register
SHIFT REGISTER
SLAVE MCU
MOTOROLA
on page
6-spi
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