MC68HC08AZ60CFU MOTOROLA [Motorola, Inc], MC68HC08AZ60CFU Datasheet - Page 90

• Manufacturer Part Number: MC68HC08AZ60CFU
• Description: Advance Information
• Manufacturer: MOTOROLA [Motorola, Inc]

System Integration Module (SIM)
Power-On Reset
MC68HC08AZ60 — Rev 1.0
90
When power is first applied to the MCU, the power-on reset module
(POR) generates a pulse to indicate that power-on has occurred. The
external reset pin (RST) is held low while the SIM counter counts out
4096 CGMXCLK cycles. Another sixty-four CGMXCLK cycles later, the
CPU and memories are released from reset to allow the reset vector
sequence to occur.
At power-on, the following events occur:
CGMXCLK
Freescale Semiconductor, Inc.
•
•
•
•
•
•
IRST
RST
IAB
For More Information On This Product,
A POR pulse is generated.
The internal reset signal is asserted.
The SIM enables CGMOUT.
Internal clocks to the CPU and modules are held inactive for 4096
CGMXCLK cycles to allow stabilization of the oscillator.
The RST pin is driven low during the oscillator stabilization time.
The POR bit of the SIM reset status register (SRSR) is set and all
other bits in the register are cleared.
System Integration Module (SIM)
Go to: www.freescale.com
Figure 6. Sources of Internal Reset
ILLEGAL ADDRESS RST
ILLEGAL OPCODE RST
RST PULLED LOW BY MCU
Figure 5. Internal Reset Timing
COPRST
32 CYCLES
POR
LVI
INTERNAL RESET
32 CYCLES
VECTOR HIGH
MOTOROLA
8-sim