PIC18F1220 MICROCHIP [Microchip Technology], PIC18F1220 Datasheet - Page 206

• Manufacturer Part Number: PIC18F1220
• Description: 18/20/28-Pin High-Performance, Enhanced Flash Microcontrollers with 10-bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F1220/1320
BTFSC
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39605C-page 204
Q Cycle Activity:
If skip:
If skip and followed by 2-word instruction:
Before Instruction
After Instruction
operation
operation
operation
Decode
PC
If FLAG<1>
If FLAG<1>
Q1
Q1
Q1
No
No
No
PC
PC
Bit Test File, Skip if Clear
[ label ] BTFSC f,b[,a]
0
0
a
skip if (f<b>) = 0
None
If bit ‘b’ in register ‘f’ is ‘0’, then the
next instruction is skipped.
If bit ‘b’ is ‘0’, then the next
instruction fetched during the current
instruction execution is discarded
and a NOP is executed instead,
making this a two-cycle instruction. If
‘a’ is ‘0’, the Access Bank will be
selected, overriding the BSR value. If
‘a’ = 1, then the bank will be selected
as per the BSR value (default).
1
1(2)
Note: 3 cycles if skip and followed
HERE
FALSE
TRUE
register ‘f’
operation
operation
operation
1011
Read
Q2
Q2
Q2
=
=
=
=
=
No
No
No
f
b
[0,1]
255
7
address (HERE)
0;
address (TRUE)
1;
address (FALSE)
by a 2-word instruction.
BTFSC
:
:
bbba
operation
operation
operation
Process
Data
Q3
Q3
Q3
No
No
No
FLAG, 1
ffff
operation
operation
operation
operation
Q4
Q4
Q4
No
No
No
No
ffff
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
If skip:
If skip and followed by 2-word instruction:
Before Instruction
After Instruction
operation
operation
operation
Decode
PC
If FLAG<1>
If FLAG<1>
Q1
Q1
Q1
No
No
No
PC
PC
Bit Test File, Skip if Set
[ label ] BTFSS f,b[,a]
0
0
a
skip if (f<b>) = 1
None
If bit ‘b’ in register ‘f’ is ‘1’, then the
next instruction is skipped.
If bit ‘b’ is ‘1’, then the next
instruction fetched during the current
instruction execution is discarded
and a NOP is executed instead,
making this a two-cycle instruction. If
‘a’ is ‘0’, the Access Bank will be
selected, overriding the BSR value. If
‘a’ = 1, then the bank will be selected
as per the BSR value (default).
1
1(2)
Note:
HERE
FALSE
TRUE
register ‘f’
operation
operation
operation
1010
Read
Q2
Q2
Q2
=
=
=
=
=
No
No
No
f
b < 7
[0,1]
 2004 Microchip Technology Inc.
255
address (HERE)
0;
address (FALSE)
1;
address (TRUE)
3 cycles if skip and followed
by a 2-word instruction.
BTFSS
:
:
bbba
operation
operation
operation
Process
Data
Q3
Q3
Q3
No
No
No
FLAG, 1
ffff
operation
operation
operation
operation
Q4
Q4
Q4
No
No
No
No
ffff