PIC18F1220 MICROCHIP [Microchip Technology], PIC18F1220 Datasheet - Page 228
![no-image](/images/no-image-200.jpg)
PIC18F1220
Manufacturer Part Number
PIC18F1220
Description
18/20/28-Pin High-Performance, Enhanced Flash Microcontrollers with 10-bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F1220.pdf
(310 pages)
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Part Number:
PIC18F1220-E/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
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Part Number:
PIC18F1220-I/P
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PIC18F1220/1320
SLEEP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
† If WDT causes wake-up, this bit is cleared.
DS39605C-page 226
Q Cycle Activity:
Before Instruction
After Instruction
Decode
TO =
PD =
TO =
PD =
Q1
?
?
1
0
operation
†
Enter Sleep mode
[ label ] SLEEP
None
00h
0
1
0
TO, PD
The Power-down status bit (PD) is
cleared. The Time-out status bit
(TO) is set. The Watchdog Timer
and its postscaler are cleared.
The processor is put into Sleep
mode with the oscillator stopped.
1
1
SLEEP
No
Q2
0000
WDT postscaler,
TO,
PD
WDT,
0000
Process
Data
Q3
0000
Go to
Sleep
Q4
0011
SUBFWB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example 1:
Example 2:
Example 3:
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
Q1
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
register ‘f’
(W) – (f) – (C)
N, OV, C, DC, Z
Subtract f from W with borrow
[ label ] SUBFWB
0
d
a
Subtract register ‘f’ and Carry flag
(borrow) from W (2’s complement
method). If ‘d’ is ‘0’, the result is
stored in W. If ‘d’ is ‘1’, the result is
stored in register ‘f’ (default). If ‘a’ is
‘0’, the Access Bank will be
selected, overriding the BSR value.
If ‘a’ is ‘1’, then the bank will be
selected as per the BSR value
(default).
1
1
SUBFWB REG
SUBFWB
SUBFWB
Read
Q2
0101
0x03
0x02
0x01
0xFF
0x02
0x00
0x00
0x01
2
5
1
2
3
1
0
0
1
2
0
0
2
1
1
0
2004 Microchip Technology Inc.
f
[0,1]
[0,1]
255
01da
REG, 0, 0
REG, 1, 0
; result is negative
; result is zero
Process
; result is positive
Data
Q3
dest
ffff
f [,d [,a]]
destination
Write to
Q4
ffff
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