PIC18F1220 MICROCHIP [Microchip Technology], PIC18F1220 Datasheet - Page 84

• Manufacturer Part Number: PIC18F1220
• Description: 18/20/28-Pin High-Performance, Enhanced Flash Microcontrollers with 10-bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F1220/1320
9.4
The IPR registers contain the individual priority bits for
the peripheral interrupts. Due to the number of
peripheral interrupt sources, there are two Peripheral
Interrupt Priority registers (IPR1, IPR2). Using the
priority bits requires that the Interrupt Priority Enable
(IPEN) bit be set.
REGISTER 9-8:
DS39605C-page 82
IPR Registers
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
IPR1: PERIPHERAL INTERRUPT PRIORITY REGISTER 1
bit 7
Unimplemented: Read as ‘0’
ADIP: A/D Converter Interrupt Priority bit
1 = High priority
0 = Low priority
RCIP: EUSART Receive Interrupt Priority bit
1 = High priority
0 = Low priority
TXIP: EUSART Transmit Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
CCP1IP: CCP1 Interrupt Priority bit
1 = High priority
0 = Low priority
TMR2IP: TMR2 to PR2 Match Interrupt Priority bit
1 = High priority
0 = Low priority
TMR1IP: TMR1 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
Legend:
R = Readable bit
-n = Value at POR
U-0
—
R/W-1
ADIP
R/W-1
RCIP
W = Writable bit
‘1’ = Bit is set
R/W-1
TXIP
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
CCP1IP
R/W-1
 2004 Microchip Technology Inc.
x = Bit is unknown
TMR2IP
R/W-1
TMR1IP
R/W-1
bit 0