NHPXA270CXXX INTEL [Intel Corporation], NHPXA270CXXX Datasheet - Page 107
NHPXA270CXXX
Manufacturer Part Number
NHPXA270CXXX
Description
Electrical, Mechanical, and Thermal Specification
Manufacturer
INTEL [Intel Corporation]
Datasheet
1.NHPXA270CXXX.pdf
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6.5
Electrical, Mechanical, and Thermal Specification
Figure 6-28. LCD Timing Definitions
Table 6-22. LCD Timing Specifications
LCD Timing Specifications
Figure 6-28
referenced to the pixel clock (L_PCLK_WR).
Symbol
Tpclkdv
Tpclklv
Tpclkfv
Tpclkbv
NOTES:
1. The LCD data pins can be programmed to be driven on either the rising or falling edge of the pixel clock
2. These LCD signals can toggle when L_PCLK_WR is not clocking (between frames). At this time, they are
L_PCLK_WR
L_FCLK_RD
L_LCLK_A0
L_LDD[17:0]
L_LDD[17:0]
(L_PCLK_WR).
clocked with the internal version of the pixel clock before it is driven out onto the L_PCLK_WR pin.
L_BIAS
(rise)
(fall)
describes the LCD timing parameters. The LCD pin timing specifications are
Description
L_PCLK_WR rise/fall to L_LDD<17:0>
driven valid
L_PCLK_WR fall to L_LCLK_A0 driven
valid
L_PCLK_WR fall to L_FCLK_RD driven
valid
L_PCLK_WR rise to L_BIAS driven valid
T pclkdv
T pclkbv
T pclklv
T pclkfv
Table 6-22
Min
gives the values for the parameters.
—
—
—
—
T pclkdv
AC Timing Specifications
Intel® PXA270 Processor
Max
14
14
14
14
Units
ns
ns
ns
ns
Notes
6-43
1
2
2
2
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