NHPXA270CXXX INTEL [Intel Corporation], NHPXA270CXXX Datasheet - Page 76

• Manufacturer Part Number: NHPXA270CXXX
• Description: Electrical, Mechanical, and Thermal Specification
• Manufacturer: INTEL [Intel Corporation]

Intel® PXA270 Processor
AC Timing Specifications
6.4
6.4.1
6.4.2
6-12
Table 6-14. SRAM Read/Write AC Specification
Note: The diagrams in this section use the following conventions:
Memory and Expansion-Card Timing Specifications
Interfaces with the following memories must observe the AC timing requirements given in the
following subsections:
Internal SRAM Read/Write Timing Specifications
SDRAM Parameters and Timing Diagrams
Table 6-15
for additional SDRAM bus tenure information. See
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Symbols
tsramRD
tsramWR
Section 6.4.1, “Internal SRAM Read/Write Timing Specifications”
Section 6.4.2, “SDRAM Parameters and Timing Diagrams”
Section 6.4.3, “ROM Parameters and Timing Diagrams”
Section 6.4.4, “Flash Memory Parameters and Timing Diagrams”
Section 6.4.5, “SRAM Parameters and Timing Diagrams”
Section 6.4.6, “Variable-Latency I/O Parameters and Timing Diagrams”
Section 6.4.7, “Expansion-Card Interface Parameters and Timing Diagrams”
Input signals to the processor are represented using dashed waveforms.
Outputs and bidirectional signals are represented using solid waveforms.
Fixed parameters are shown using double arrows in grey (black and white print) or green
(color print).
Programmable parameters are shown using bold single arrows.
The processor register that is used to change a specific timing is given in the corresponding
timing table.
shows the timing parameters used in
Parameters
4-beat read transfer
4-beat write transfer
Electrical, Mechanical, and Thermal Specification
Figure
Figure 6-10
6-7. Also see
MIN
—
—
for SDRAM fly-by bus tenures.
TYP
9
7
Section 6.4.3
MAX
—
—
and
system bus
system bus
Figure 6-11
clocks
clocks
Units