MC68HC705P9CDW FREESCALE [Freescale Semiconductor, Inc], MC68HC705P9CDW Datasheet - Page 153
MC68HC705P9CDW
Manufacturer Part Number
MC68HC705P9CDW
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC68HC705P9CDW.pdf
(160 pages)
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Technical Data — MC68HC705P9
accumulator (A) . . . . . . . . . . . . . . .49–50,
ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ADC (analog-to-digital converter)
ADC data register (ADDR) . . . .132,
ADC status and control
addressing modes . . . . . . . . . . . . . . . . . .
ADON bit . . . . . . . . . . . . . . . . . . . .
ADRC bit . . . . . . . . . . . . . . . . .132, 134,
alternate timer registers (ATRH/L) . . . . .
ALU . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AN[3:0] bits . . . . . . . . . . . . . . . . . . . . . . . .
arithmetic/logic unit (ALU) . . . . . . . . . . . .
bootloader ROM . . . . . . . . . . . . . . . . . . . .
brownout . . . . . . . . . . . . . . . . . . . . . . . .68,
bypass capacitors . . . . . . . . . . . . . . . . . . .
MOTOROLA
block diagram . . . . . . . . . . . . . . . . . .
features . . . . . . . . . . . . . . . . . . . . . . .
I/O register summary . . . . . . . . . . . .
I/O registers . . . . . . . . . . . . . . . . . . .
low-power modes . . . . . . . . . . . . . . .
bootload procedure . . . . . . . . . . . . . . .
bootloader circuit . . . . . . . . . . . . . . . . .
location . . . . . . . . . . . . . . . . . . . . . . . .
register (ADSCR) . . . . . . . . . .132,
A
B
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.135–136
134–136
.130
.129
.131
.134
.136
.113
134
136
.50
.41
.88
.44
.88
.45
.37
.40
.39
.26
53
96
Index
C bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
case outlines . . . . . . . . . . . . . . . . . .
CCF bit . . . . . . . . . . . . . . . . . . . . . . . 132,
ceramic resonator circuit . . . . . . . . . . . . . .
CH[2:0] bits . . . . . . . . . . . . . . . . . . . . . .
condition code register
COP register (COPR) . . . . . . . . . . . . . 68,
COP watchdog
COP watchdog reset . . . . . . . . . . . 68,
COPC bit . . . . . . . . . . . . . . . . . . . . 68,
COPE bit . . . . . . . . . . . . . . . . . . . . . . . . .
CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
COP in stop mode . . . . . . . . . . . . . . . .
COP in wait mode . . . . . . . . . . . . . . . .
COP register (COPR) . . . . . . . . . . . . . .
enabling and disabling . . . . . . . . . . . . .
features . . . . . . . . . . . . . . . . . . . . . . . . .
operation . . . . . . . . . . . . . . . . . . . . . . .
timeout period . . . . . . . . . . . . . . . . . . .
block diagram . . . . . . . . . . . . . . . . . . .
control unit . . . . . . . . . . . . . . . . . . . . . .
features . . . . . . . . . . . . . . . . . . . . . . . . .
instruction set summary . . . . . . . . . . .
instruction types . . . . . . . . . . . . . . . . .
instructions set . . . . . . . . . . . . . . . . . .
opcode map . . . . . . . . . . . . . . . . . . . . .
registers . . . . . . . . . . . . . . . . . . . . . . .
(CCR) . . .45, 55, 69, 71–72,
C
Index
149–151
112–115
96–97
97–98
.135
134
.98
.96
.96
.42
.45
.58
.52
.49
.45
153
55
28
97
98
97
42
95
44
44
44
64
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