MC68HC705V12CFN MOTOROLA [Motorola, Inc], MC68HC705V12CFN Datasheet - Page 119

• Manufacturer Part Number: MC68HC705V12CFN
• Description: The Motorola microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

11.4.3 PWMA Data Register
11.4.4 PWMB Data Register
MC68HC705V12
MOTOROLA
—
Rev. 3.0
Address:
Address:
The PWMA system has one 6-bit data register which holds the duty
cycle information. The data bits in this register are unaffected by reset.
A value of $00 in this register corresponds to a steady state output level
(0 percent duty cycle) on the PWMA pin. The logic level of the output will
depend on the value of the POLA bit in the PWMA control register.
POLA — PWMA Polarity Bits
The PWMB system has one 6-bit data register which holds the duty
cycle information. These bits work the same way as the data bits in the
PWMA data register except they affect the PWMB output pin. The data
bits in this register are unaffected by reset.
POLB — PWMB Polarity Bit
Reset:
Reset:
Read:
Read:
Write:
Write:
1 = PWMA pulse is active high.
0 = PWMA pulse is active low.
1 = PWMB pulse is active high.
0 = PWMB pulse is active low.
$0036
$0038
POLA
POLB
Bit 7
Bit 7
0
0
Pulse Width Modulators (PWMs)
Figure 11-7. PWMA Data Register (PWMAD)
Figure 11-8. PWMB Data Register (PWMBD)
= Unimplemented
= Unimplemented
6
0
0
6
0
0
D5
D5
U
U
5
5
U = Unaffected
U = Unaffected
D4
D4
U
U
4
4
D3
D3
U
U
3
3
Pulse Width Modulators (PWMs)
D2
D2
U
U
2
2
Advance Information
D1
D1
PWM Registers
U
U
1
1
Bit 0
Bit 0
D0
D0
U
U
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