MC68HC705V12CFN MOTOROLA [Motorola, Inc], MC68HC705V12CFN Datasheet - Page 143
MC68HC705V12CFN
Manufacturer Part Number
MC68HC705V12CFN
Description
The Motorola microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC705V12CFN.pdf
(248 pages)
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14.4.1.1 Power Off Mode
14.4.1.2 Reset Mode
14.4.1.3 Run Mode
MC68HC705V12
MOTOROLA
—
Rev. 3.0
For the BDLC to guarantee operation, this mode is entered from reset
mode whenever the BDLC supply voltage, V
minimum specified value. The BDLC will be placed in reset mode by
low-voltage reset (LVR) before being powered down. In power off mode,
the pin input and output specifications are not guaranteed.
This mode is entered from power off mode whenever the BDLC supply
voltage, V
(V
reset must be asserted while powering up the BDLC or an unknown
state will be entered and correct operation cannot be guaranteed. Reset
mode is also entered from any other mode as soon as one of the MCU’s
possible reset sources (such as LVR, POR, COP watchdog, reset pin,
etc.) is asserted.
In reset mode, the internal BDLC voltage references are operative, V
is supplied to the internal circuits which are held in their reset state, and
the internal BDLC system clock is running. Registers will assume their
reset condition. Because outputs are held in their programmed reset
state, inputs and network activity are ignored.
This mode is entered from reset mode after all MCU reset sources are
no longer asserted. Run mode is entered from the BDLC wait mode
whenever activity is sensed on the J1850 bus.
Run mode is entered from the BDLC stop mode whenever network
activity is sensed, although messages will not be received properly until
the clocks have stabilized and the CPU is also in run mode.
In this mode, normal network operation takes place. The user should
ensure that all BDLC transmissions have ceased before exiting this
mode.
DD
Byte Data Link Controller – Digital (BDLC–D)
–10%) and some MCU reset source is asserted. The internal MCU
DD
, rises above its minimum specified value
Byte Data Link Controller – Digital (BDLC–D)
DD
, drops below its
Functional Description
Advance Information
DD
143
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