MC68HC705V12CFN MOTOROLA [Motorola, Inc], MC68HC705V12CFN Datasheet - Page 76
MC68HC705V12CFN
Manufacturer Part Number
MC68HC705V12CFN
Description
The Motorola microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC705V12CFN.pdf
(248 pages)
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Low-Power Modes
6.4 Stop Mode
Advance Information
76
NOTE:
Execution of the STOP instruction with the MOR[STOPE] bit set places
the MCU in its lowest power-consumption mode. In stop mode, the
internal oscillator is turned off, halting all internal processing, including
the COP watchdog timer.
During stop mode, the TCR bits are altered to remove any pending timer
interrupt request and to disable any further timer interrupts. The timer
prescaler is cleared. The I bit in the condition code register (CCR) is
cleared and the IRQE mask is set in the ICSR to enable external
interrupts. All other registers and memory remain unaltered. All
input/output lines remain unchanged.
The MCU can be brought out of stop mode only by:
When exiting the stop mode, the internal oscillator will resume after a
4064 internal processor clock cycle oscillator stabilization delay as
shown in
Entering stop mode will cause the oscillator to stop and, therefore,
disable the COP watchdog timer. If the COP watchdog timer is to be
used, stop mode should be disabled by programming MOR[STOPE] to
a 0.
•
•
•
•
An IRQ pin external interrupt
An externally generated reset
A falling edge on any port C pin (if enabled)
A rising edge on the BDLC RXP pin
Figure
Low-Power Modes
6-1.
MC68HC705V12
MOTOROLA
—
Rev. 3.0
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