PEB20534H-10 SIEMENS [Siemens Semiconductor Group], PEB20534H-10 Datasheet - Page 165
PEB20534H-10
Manufacturer Part Number
PEB20534H-10
Description
DMA Supported Serial Communication Controller with 4 Channels DSCC4
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.PEB20534H-10.pdf
(442 pages)
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register ISR, if this function is enabled by setting the ’CSC’ bit in register IMR to ’0’.
Figure 59
Beyond this standard RTS function, signifying a transmission request of a frame
(Request To Send), in HDLC mode the RTS output may be programmed for a special
function via SOC1, SOC0 bits in the CCR1 register. This is only available if the serial
channel is operating in a bus configuration mode in clock mode 0 or 1.
• If SOC1, SOC0 bits are set to ‘11’, the RTS output is active (= low) during the
• If SOC1, SOC0 bits are set to ‘10’, the RTS output function is disabled and the RTS
ASYNC: In the case where permission to transmit is withdrawn, transmission of the
current character is completed. After that, IDLE is sent. After transmission is enabled
again by re-activation of CTS, the next available character is sent out.
Note: In the case where permission to transmit is not required, the CTS input can be
Additionally, any transition on the CTS input pin will generate an interrupt indicated via
Semiconductor Group
reception of a frame.
pin remains always high.
frame is started by providing new data to the DMA controller too early. For this
purpose the All Sent interrupt (ISR.ALLS) has to be waited for before forwarding
new data to the DMA controller.
connected directly to
RTS
CTS
TxCLK
TxD
RTS/CTS Handshaking
V
SS
.
Serial Communication Controller (SCC) Cores
165
Sampling
ITT00244
Data Sheet 09.98
PEB 20534
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