PIC18F2682-I/PT MICROCHIP [Microchip Technology], PIC18F2682-I/PT Datasheet - Page 162

no-image

PIC18F2682-I/PT

Manufacturer Part Number
PIC18F2682-I/PT
Description
28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
PIC18F2682/2685/4682/4685
14.1
Timer3 can operate in one of three modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
The operating mode is determined by the clock select
bit, TMR3CS (T3CON<1>). When TMR3CS is cleared
(= 0), Timer3 increments on every internal instruction
FIGURE 14-1:
FIGURE 14-2:
DS39761B-page 160
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
T1OSO/T13CKI
T1OSO/T13CKI
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
Timer3 Operation
T1OSI
T1OSI
CCP1/ECCP1 Special Event Trigger
CCP1/ECCP1 Special Event Trigger
Timer1 Oscillator
Timer1 Oscillator
TIMER3 BLOCK DIAGRAM
T1OSCEN
T3CKPS1:T3CKPS0
T3SYNC
TMR3ON
TIMER3 BLOCK DIAGRAM (16-BIT READ/WRITE MODE)
T1OSCEN
T3CKPS1:T3CKPS0
T3SYNC
TMR3ON
(1)
(1)
TCCPx
TCCPx
TMR3CS
TMR3CS
F
Internal
Clock
Internal
Clock
F
OSC
OSC
/4
/4
Preliminary
1
0
1
0
Clear TMR3
Timer1 clock input
Clear TMR3
Prescaler
Prescaler
1, 2, 4, 8
1, 2, 4, 8
cycle (F
on every rising edge of the Timer1 external clock input
or the Timer1 oscillator if enabled.
As with Timer1, the RC1/T1OSI and RC0/T1OSO/
T13CKI pins become inputs when the Timer1 oscillator
is enabled. This means the values of TRISC<1:0> are
ignored and the pins are read as ‘0’.
2
2
OSC
TMR3L
TMR3L
/4). When the bit is set, Timer3 increments
8
8
Synchronize
Synchronize
Sleep Input
Sleep Input
High Byte
Detect
TMR3H
Detect
TMR3
High Byte
8
TMR3
© 2007 Microchip Technology Inc.
8
8
1
0
1
0
Set
TMR3IF
on Overflow
Read TMR1L
Write TMR1L
Internal Data Bus
Set
TMR3IF
on Overflow
Timer3
On/Off
Timer3
On/Off

Related parts for PIC18F2682-I/PT