PIC18F2682-I/PT MICROCHIP [Microchip Technology], PIC18F2682-I/PT Datasheet - Page 241

• Manufacturer Part Number: PIC18F2682-I/PT
• Description: 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

FIGURE 18-7:
TABLE 18-6:
© 2007 Microchip Technology Inc.
INTCON
PIR1
PIE1
IPR1
RCSTA
RCREG
TXSTA
BAUDCON
SPBRGH
SPBRG
Legend: — = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous reception.
Note 1:
Note:
RX (pin)
Rcv Shift Reg
Rcv Buffer Reg
Read Rcv
Buffer Reg
RCREG
RCIF
(Interrupt Flag)
OERR bit
CREN
Name
Reserved in PIC18F2682/2685 devices; always maintain these bits clear.
This timing diagram shows three words appearing on the RX input. The RCREG (Receive Buffer) is read after the third word
causing the OERR (Overrun) bit to be set.
EUSART Receive Register
EUSART Baud Rate Generator Register High Byte
EUSART Baud Rate Generator Register Low Byte
GIE/GIEH PEIE/GIEL TMR0IE
ABDOVF
PSPIF
PSPIE
PSPIP
CSRC
SPEN
Bit 7
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Start
ASYNCHRONOUS RECEPTION
(1)
(1)
(1)
bit
bit 0
RCIDL
ADIF
ADIE
ADIP
Bit 6
RX9
TX9
bit 1
SREN
TXEN
RCIE
RCIP
RCIF
Bit 5
—
PIC18F2682/2685/4682/4685
bit 7/8
Preliminary
Stop
INT0IE
bit
CREN
SYNC
SCKP
TXIE
TXIP
Bit 4
TXIF
Word 1
RCREG
Start
bit
bit 0
ADDEN
SENDB
BRG16
SSPIE
SSPIP
SSPIF
RBIE
Bit 3
TMR0IF
CCP1IE
CCP1IP
bit 7/8
CCP1IF
Word 2
RCREG
BRGH
FERR
Bit 2
—
Stop
bit
TMR2IE
TMR2IP
TMR2IF
INT0IF
OERR
Start
TRMT
WUE
bit
Bit 1
TMR1IF
TMR1IE
TMR1IP
ABDEN
bit 7/8
RX9D
TX9D
RBIF
DS39761B-page 239
Bit 0
Stop
bit
on page
Values
Reset
49
52
52
52
51
51
51
51
51
51