PIC18F2682-I/PT MICROCHIP [Microchip Technology], PIC18F2682-I/PT Datasheet - Page 79

• Manufacturer Part Number: PIC18F2682-I/PT
• Description: 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

TABLE 5-2:
© 2007 Microchip Technology Inc.
STATUS
TMR0H
TMR0L
T0CON
OSCCON
HLVDCON
WDTCON
RCON
TMR1H
TMR1L
T1CON
TMR2
PR2
T2CON
SSPBUF
SSPADD
SSPSTAT
SSPCON1
SSPCON2
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
CCPR1H
CCPR1L
CCP1CON
ECCPR1H
ECCPR1L
ECCP1CON
BAUDCON
ECCP1DEL
ECCP1AS
CVRCON
CMCON
TMR3H
TMR3L
T3CON
Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition. Shaded cells are unimplemented, read as ‘0’.
Note 1:
File Name
2:
3:
4:
5:
6:
7:
8:
9:
(9)
(9)
(9)
(9)
(9)
Bit 21 of the PC is only available in Test mode and Serial Programming modes.
The SBOREN bit is only available when CONFIG2L<1:0> = 01; otherwise, it is disabled and reads as ‘0’. See Section 4.4 “Brown-out Reset
(BOR)”.
These registers and/or bits are not implemented on PIC18F2682/2685 devices and are read as ‘0’. Reset values are shown for PIC18F4682/4685
devices; individual unimplemented bits should be interpreted as ‘—’.
The PLLEN bit is only available in specific oscillator configurations; otherwise, it is disabled and reads as ‘0’. See Section 2.6.4 “PLL in INTOSC
Modes”.
The RE3 bit is only available when Master Clear Reset is disabled (CONFIG3H<7> = 0); otherwise, RE3 reads as ‘0’. This bit is read-only.
RA6/RA7 and their associated latch and direction bits are individually configured as port pins based on various primary oscillator modes. When
disabled, these bits read as ‘0’.
CAN bits have multiple functions depending on the selected mode of the CAN module.
This register reads all ‘0’s until the ECAN™ technology is set up in Mode 1 or Mode 2.
These registers and/or bits are available on PIC18F4682/4685 devices only.
(9)
(9)
Timer0 Register High Byte
Timer0 Register Low Byte
Timer1 Register High Byte
Timer1 Register Low Byte
Timer2 Register
Timer2 Period Register
MSSP Receive Buffer/Transmit Register
MSSP Address Register in I
A/D Result Register High Byte
A/D Result Register Low Byte
Capture/Compare/PWM Register 1 High Byte
Capture/Compare/PWM Register 1 Low Byte
Enhanced Capture/Compare/PWM Register 1 High Byte
Enhanced Capture/Compare/PWM Register 1 Low Byte
Timer3 Register High Byte
Timer3 Register Low Byte
EPWM1M1 EPWM1M0
VDIRMAG
ECCPASE
TMR0ON
ABDOVF
PRSEN
CVREN
C2OUT
IDLEN
WCOL
GCEN
ADFM
RD16
RD16
IPEN
Bit 7
SMP
—
—
—
—
—
—
REGISTER FILE SUMMARY (PIC18F2682/2685/4682/4685) (CONTINUED)
T3ECCP1
SBOREN
T2OUTPS3 T2OUTPS2 T2OUTPS1
ECCPAS2
ACKSTAT
PDC6
CVROE
T1RUN
SSPOV
C1OUT
T08BIT
RCIDL
IRCF2
Bit 6
CKE
—
—
—
—
—
—
—
(3)
(2)
(9)
2
ECCPAS1
T1CKPS1
T3CKPS1
C™ Slave mode, MSSP Baud Rate Reload Register in I
EDC1B1
PDC5
SSPEN
ACKDT
VCFG1
ACQT2
DC1B1
IRCF1
IRVST
CVRR
C2INV
CHS3
T0CS
Bit 5
D/A
—
—
—
—
(3)
ECCPAS0
T1CKPS0
T3CKPS0
HLVDEN
EDC1B0
PDC4
PIC18F2682/2685/4682/4685
ACKEN
VCFG0
ACQT1
CVRSS
DC1B0
IRCF0
C1INV
CHS2
SCKP
T0SE
Bit 4
CKP
—
RI
N
P
(3)
Preliminary
T2OUTPS0
T1OSCEN
ECCP1M3
T3CCP1
CCP1M3
PSSAC1
HLVDL3
PDC3
SSPM3
PCFG3
ACQT0
BRG16
OSTS
RCEN
CHS1
CVR3
Bit 3
PSA
CIS
OV
TO
—
S
(3)
(9)
ECCP1M2
TMR2ON
T1SYNC
CCP1M2
PSSAC0
T3SYNC
HLVDL2
PDC2
SSPM2
PCFG2
ADCS2
T0PS2
CHS0
CVR2
IOFS
Bit 2
R/W
PEN
CM2
PD
—
—
Z
(3)
2
C Master mode
PSSBD1
GO/DONE
ECCP1M1
T2CKPS1
TMR1CS
CCP1M1
TMR3CS
HLVDL1
PDC1
SSPM1
PCFG1
ADCS1
T0PS1
RSEN
SCS1
CVR1
WUE
POR
Bit 1
CM1
DC
UA
—
(3)
(3)
PSSBD0
ECCP1M0
SWDTEN
T2CKPS0
TMR1ON
TMR3ON
CCP1M0
HLVDL0
PDC0
ABDEN
SSPM0
PCFG0
ADCS0
T0PS0
ADON
SCS0
CVR0
BOR
Bit 0
SEN
CM0
BF
C
(3)
(3)
DS39761B-page 77
---x xxxx
0000 0000 50, 149
xxxx xxxx 50, 149
1111 1111 50, 149
0100 q000
0-00 0101 50, 267
0q-1 11q0 50, 127
xxxx xxxx 50, 155
0000 0000 50, 155
0000 0000 50, 151
1111 1111 50, 158
-000 0000 50, 155
-000 0000 50, 157
xxxx xxxx 50, 195
0000 0000 50, 195
0000 0000 50, 197
0000 0000 50, 198
0000 0000 50, 199
xxxx xxxx 50, 256
xxxx xxxx 50, 256
--00 0000 50, 247
--00 0qqq 50, 248
0-00 0000 51, 249
xxxx xxxx 51, 168
xxxx xxxx 51, 168
--00 0000 51, 163
xxxx xxxx 51, 167
xxxx xxxx 51, 167
0000 0000 51, 168
01-0 0-00 51, 230
0000 0000 51, 182
0000 0000 51, 183
0000 0000 51, 263
0000 0000 51, 257
xxxx xxxx 51, 161
xxxx xxxx 51, 161
0000 0000 51, 161
POR, BOR
--- ---0
Value on
on page:
Details
50, 354
50, 87
30, 50