PIC18F2682-I/PT MICROCHIP [Microchip Technology], PIC18F2682-I/PT Datasheet - Page 321
PIC18F2682-I/PT
Manufacturer Part Number
PIC18F2682-I/PT
Description
28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F2682-IPT.pdf
(484 pages)
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REGISTER 23-59: TXBIE: TRANSMIT BUFFERS INTERRUPT ENABLE REGISTER
REGISTER 23-60: BIE0: BUFFER INTERRUPT ENABLE REGISTER 0
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-2
bit 1-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-2
bit 1-0
Note 1:
B5IE
R/W-0
U-0
—
2:
2:
(2)
This register is available in Mode 1 and 2 only.
TXBnIE in PIE3 register must be set to get an interrupt.
This register is available in Mode 1 and 2 only.
Either TXBnIE or RXBnIE in PIE3 register must be set to get an interrupt.
Unimplemented: Read as ‘0’
TXB2IE:TXB0IE: Transmit Buffer 2-0 Interrupt Enable bit
1 = Transmit buffer interrupt is enabled
0 = Transmit buffer interrupt is disabled
Unimplemented: Read as ‘0’
B5IE:B0IE: Programmable Transmit/Receive Buffer 5-0 Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
RXB1IE:RXB0IE: Dedicated Receive Buffer 1-0 Interrupt Enable bit
1 = Interrupt is enabled
0 = Interrupt is disabled
B4IE
R/W-0
U-0
—
(2)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
B3IE
R/W-0
U-0
—
(2)
PIC18F2682/2685/4682/4685
TXB2IE
B2IE
R/W-0
R/W-0
Preliminary
(2)
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TXB1IE
B1IE
R/W-0
R/W-0
(2)
(2)
(2)
TXB0IE
B0IE
R/W-0
R/W-0
(1)
(2)
(2)
(2)
x = Bit is unknown
x = Bit is unknown
RXB1IE
(2)
R/W-0
U-0
—
(1)
DS39761B-page 319
(2)
RXB0IE
R/W-0
U-0
—
bit 0
bit 0
(2)
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