PIC18F2682-I/PT MICROCHIP [Microchip Technology], PIC18F2682-I/PT Datasheet - Page 187

• Manufacturer Part Number: PIC18F2682-I/PT
• Description: 28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

16.4.9
The following steps should be taken when configuring
the ECCP1 module for PWM operation:
1.
2.
3.
4.
5.
6.
7.
8.
9.
© 2007 Microchip Technology Inc.
Configure the PWM pins, P1A and P1B (and
P1C and P1D, if used), as inputs by setting the
corresponding TRIS bits.
Set the PWM period by loading the PR2 register.
Configure the ECCP1 module for the desired
PWM mode and configuration by loading the
ECCP1CON register with the appropriate values:
• Select one of the available output
• Select the polarities of the PWM output
Set the PWM duty cycle by loading the
ECCPR1L register and ECCP1CON<5:4> bits.
For Half-Bridge Output mode, set the dead-
band delay by loading ECCP1DEL<6:0> with
the appropriate value.
If auto-shutdown operation is required, load the
ECCP1AS register:
• Select the auto-shutdown sources using the
• Select the shutdown states of the PWM
• Set the ECCPASE bit (ECCP1AS<7>).
• Configure the comparators using the CMCON
• Configure the comparator inputs as analog
If auto-restart operation is required, set the
PRSEN bit (ECCP1DEL<7>).
Configure and start TMR2:
• Clear the TMR2 interrupt flag bit by clearing
• Set the TMR2 prescale value by loading the
• Enable Timer2 by setting the TMR2ON bit
Enable PWM outputs after a new PWM cycle
has started:
• Wait until TMRx overflows (TMRxIF bit is set).
• Enable the ECCP1/P1A, P1B, P1C and/or
• Clear the ECCPASE bit (ECCP1AS<7>).
configurations and direction with the
EPWM1M1:EPWM1M0 bits.
signals with the ECCP1M3:ECCP1M0 bits.
ECCPAS2:ECCPAS0 bits.
output pins using PSSAC1:PSSAC0 and
PSSBD1:PSSBD0 bits.
register.
inputs.
the TMR2IF bit (PIR1<1>).
T2CKPS bits (T2CON<1:0>).
(T2CON<2>).
P1D pin outputs by clearing the respective
TRIS bits.
SETUP FOR PWM OPERATION
PIC18F2682/2685/4682/4685
Preliminary
16.4.10
Both Power-on Reset and subsequent Resets will force
all ports to Input mode and the ECCP1 registers to their
Reset states.
This forces the Enhanced CCP1 module to reset to a
state compatible with the standard CCP1 module.
EFFECTS OF A RESET
DS39761B-page 185