SAB80C517-M16 SIEMENS [Siemens Semiconductor Group], SAB80C517-M16 Datasheet - Page 110
SAB80C517-M16
Manufacturer Part Number
SAB80C517-M16
Description
8-Bit CMOS Single-Chip Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.SAB80C517-M16.pdf
(323 pages)
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On-Chip Peripheral Components
Modulation Range in Compare Mode 0
As already mentioned in the general description of compare mode 0 (section 7.5.4), a 100%
variation of the duty cycle of a PWM signal cannot be reached. A time portion of 1/(2
n
) of an n-bit
timer period is always left over. This "spike" may either appear when the compare register is set to
the reload value (limiting the lower end of the modulation range) or it may occur at the end of a timer
period.
In a timer 2/CCx register configuration in compare mode 0 this spike is divided into two halves: one
at the beginning when the contents of the compare register is equal to the reload value of the timer;
the other half when the compare register is equal to the maximum value of the timer register (here:
0FFFF H ). Please refer to figure 7-44 where the maximum and minimum duty cycle of a compare
f
output signal is illustrated. Timer 2 is incremented with the machine clock (
/12), thus at 12-MHz
OSC
operational frequency, these spikes are both approx. 500 ns long.
Figure 7-44
Modulation Range of a PMW Signal Generated with a Timer 2/CCx Register Combination in
Compare Mode 0
The following example shows how to calculate the modulation range for a PWM signal. To calculate
with reasonable numbers, a reduction of the resolution to 8-bit is used. Otherwise (for the maximum
resolution of 16-bit) the modulation range would be so severely limited that it would be negligible.
Semiconductor Group
111
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