SAB80C517-M16 SIEMENS [Siemens Semiconductor Group], SAB80C517-M16 Datasheet - Page 143
SAB80C517-M16
Manufacturer Part Number
SAB80C517-M16
Description
8-Bit CMOS Single-Chip Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.SAB80C517-M16.pdf
(323 pages)
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Watchdog Reset and Watchdog Status Flag
lf the software fails to clear the watchdog in time, an internally generated watchdog reset is entered
at the counter state 7FFC H . The duration of the reset signal then depends on the prescaler
selection (either 8 cycles or 128 cycles). This internal reset differs from an external one only in so
far as the watchdog timer is not disabled and bit WDTS (watchdog timer status, bit 6 in special
function register IP0) is set. Figure 7-62 shows a block diagram of all reset requests in the SAB
80C517 and the function of the watchdog status flags. The WDTS flag is a flip-flop, which is set by
a watchdog timer reset and cleared by an external HW reset. Bit WDTS allows the software to
examine from which source the reset was activated. The watchdog timer status flag can also be
cleared by software.
Figure 7-60
Special Function Register IEN0
Bit
WDT
Figure 7-61
Special Function Register IEN1
Bit
SWDT
Semiconductor Group
0A8 H
0B8 H
EXEN2 SWDT
0AF H
0BF H
EAL
These bits are not used in controlling the fail-safe mechanisms.
These bits are not used in controlling the fail-safe mechanisms.
0AE H
0BE H
WDT
Function
Watchdog timer refresh flag.
Set to initiate a refresh of the watchdog timer. Must be set directly before
SWDT is set to prevent an unintentional refresh of the watchdog timer.
Function
Watchdog timer start flag.
Set to activate the watchdog timer. When directly set after setting WDT,
a watchdog timer refresh is performed.
0AD H
0BD H
ET2
EX6
0AC H
0BC H
ES0
EX5
144
0AB H
0BB H
EX4
ET1
On-Chip Peripheral Components
0AA H
0BA H
EX1
EX3
0A9 H
0B9 H
EX2
ET0
EADC
0A8 H
0B8 H
EX0
IEN0
IEN1
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