SAB80C517-M16 SIEMENS [Siemens Semiconductor Group], SAB80C517-M16 Datasheet - Page 131

no-image

SAB80C517-M16

Manufacturer Part Number
SAB80C517-M16
Description
8-Bit CMOS Single-Chip Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
Table 7-12
Programming a Shift or Normalize Operation
Operation
First write
Last write
First read
Last read
7.6.4
An overflow flag is provided for some exceptions during MDU calculations. There are three cases
where flag MDOV ARCON.6 is set by hardware:
Any operation of the MDU which does not match the above conditions clears the overflow flag. Note
that the overflow flag is exclusively controlled by hardware. lt cannot be written to.
7.6.5
An error flag, bit MDEF in register ARCON (figure 7-56), is provided to indicate whether one of the
arithmetic operations of the MDU (multiplication, division, normalize, shift left/right) has been
restarted or interrupted by a new operation.
This can possibly happen e.g. when an interrupt service routine interrupts the writing or reading
sequence of the arithmetic operation in the main program and starts a new operation. Then the
contents of the corresponding registers are indeterminate (they would normally show the result of
the last operation executed).
Semiconductor Group
– Division by zero
– Multiplication with a result greater then 0000 FFFF H
– Start of normalizing if the most significant bit of MD3 is set (MD3.7 = 1).
(= auxiliary carry of the lower 16bit)
The Overflow Flag
The Error Flag
Normalize, Shift Left, Shift Right
MD0
MD1
MD2
MD3
ARCON
MD0
MD1
MD2
MD3
132
On-Chip Peripheral Components
least significant byte
most significant byte
start of conversion
least significant byte
most significant byte

Related parts for SAB80C517-M16