LPC47S457-NC SMSC [SMSC Corporation], LPC47S457-NC Datasheet - Page 199

• Manufacturer Part Number: LPC47S457-NC
• Description: Advanced I/O with X-Bus Interface
• Manufacturer: SMSC [SMSC Corporation]

9.4 Chip Level (Global) Control/Configuration Registers[0x00-0x2F]
The chip-level (global) registers lie in the address range [0x00-0x2F]. The design MUST use all 8 bits of the ADDRESS
Port for register selection. All unimplemented registers and bits ignore writes and return zero when read.
The INDEX PORT is used to select a configuration register in the chip. The DATA PORT is then used to access the
selected register. These registers are accessible only in the Configuration Mode.
SMSC LPC47S45x
Config Control
Default = 0x00
on VCC POR ,
VTR POR and
PCI RESET
N/A
Logical Device #
Default = 0x00
on VCC POR,
VTR POR,
PCI RESET and
SOFT RESET
Card Level Reserved
Device ID
Default = 0x62
VCC POR,
VTR POR,
PCI RESET and
SOFT RESET
Device Rev
Default = Current Rev
VCC POR,
VTR POR,
PCI RESET and
SOFT RESET
REGISTER
0x08 – 0x1F
0x03 - 0x06
ADDRESS
(Type)
0x00 -
(R/W)
0x01
0x02
0x07
0x20
0x21
(W)
(R)
(R)
Table 82 − Chip Level Registers
Chip (Global) Control Registers
Reserved - Writes are ignored, reads return 0.
The hardware automatically clears this bit after the write, there is
no need for software to clear the bits.
Bit 0 = 1: Soft Reset. Refer to the "Configuration Registers" table
for the soft reset value for each register.
Reserved - Writes are ignored, reads return 0 .
A write to this register selects the current logical device. This
allows access to the control and configuration registers for each
logical device. Note: The Activate command operates only on
the selected logical device.
Reserved - Writes are ignored, reads return 0 .
A read only register which provides device identification.
Bits[7:0] = 0x62 when read.
A
information..
Chip Level, SMSC Defined
DATASHEET
read
Page 199 of 259
only
register
DESCRIPTION
which
provides
device
revision
Rev. 06-01-06
C
C
STATE
C
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