LPC47S457-NC SMSC [SMSC Corporation], LPC47S457-NC Datasheet - Page 257

• Manufacturer Part Number: LPC47S457-NC
• Description: Advanced I/O with X-Bus Interface
• Manufacturer: SMSC [SMSC Corporation]

13 APPENDIX - TEST MODES
13.1 Normal Operating Power Supply State
The following table defines the power supply states for normal operation of the chip.
Note: VTR power must be applied to the chip either before or at the same time as VCC. VTR must not power up
after VCC.
Note: Power is “ON” when Vbat, VTR, or VCC are greater than 2.4 volts. Power is “OFF” when the voltage is less
than 0.4 volts.
Note 1: When Vbat is turned off (i.e., the battery goes dead), the CMOS in the RTC section that is battery powered
will be lost on the next VTR_POR cycle.
The following table defines the invalid power supply states.
13.2 Test Modes
The XNOR Test chain used in the LPC47X42x is extended to accommodate the extra pins offered by the 128 QFP.
13.2.1 BOARD TEST MODE
Board test mode can be entered as follows:
See the “XNOR-Chain Test Mode” section below for a description of this board test mode.
13.2.2 XNOR-CHAIN TEST MODE
XNOR-Chain test structure allows users to confirm that all pins are in contact with the motherboard during assembly
and test operations. See Figure 41 below.
The XNOR-Chain test structure must be activated to perform these tests. When the XNOR-Chain is activated, the
LPC47S45x pin functions are disconnected from the device pins, which all become input pins except for one output
pin at the end of XNOR-Chain.
The tests that are performed when the XNOR-Chain test structure is activated require the board-level test hardware
to control the device pins and observe the results at the XNOR-Chain output pin.
The PCI_RESET# pin is not included in the XNOR-Chain. The XNOR-Chain is output on TXD1 (PIN 88). See the
following subsection for more details.
SMSC LPC47S45x
Power Loss/
“Mechanical Off”
“Normal Off”
On
Initial State (Before Battery
is installed)
Battery dies, but system
(VTR) maintains power
Battery dies, but system
(VTR) maintains power
POWER STATE
Invalid
Invalid
On the rising (deasserting) edge of PCI_RESET#, drive LFRAME# low and drive LAD[0] low.
Exit board test mode as follows:
On the rising (deasserting) edge of PCI_RESET#, drive either LFRAME# or LAD[0] high.
POWER STATE
VBAT
VBAT
OFF
OFF
OFF
OFF
ON
ON
ON
ON
DATASHEET
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VTR
OFF
VTR
OFF
OFF
OFF
ON
ON
ON
ON
VCC
VCC
OFF
OFF
OFF
OFF
ON
ON
ON
ON
valid (Note 1)
valid (Note 1)
valid (Note 1)
STATE
STATE
invalid
invalid
valid
valid
valid
Rev. 06-01-06