LPC47S457-NC SMSC [SMSC Corporation], LPC47S457-NC Datasheet - Page 83

• Manufacturer Part Number: LPC47S457-NC
• Description: Advanced I/O with X-Bus Interface
• Manufacturer: SMSC [SMSC Corporation]

6.7.4
ECP provides a number of advantages, some of which are listed below. The individual features are explained in greater
detail in the remainder of this section.
High performance half-duplex forward and reverse channel Interlocked handshake, for fast reliable transfer Optional
single byte RLE compression for improved throughput (64:1) Channel addressing for low-cost peripherals Maintains link
and data layer separation Permits the use of active output drivers permits the use of adaptive signal timing Peer-to-peer
capability.
6.7.5
The following terms are used in this document:
assert:
forward: Host to Peripheral communication.
reverse: Peripheral to Host communication
Pword:
1
0
These terms may be considered synonymous:
-
-
-
-
-
-
-
-
-
Reference Document: IEEE 1284 Extended Capabilities Port Protocol and ISA Interface Standard, Rev 1.14, July 14,
1993. This document is available from Microsoft.
The bit map of the Extended Parallel Port registers is:
Note 1: These registers are available in all modes.
Note 2: All FIFOs use one common 16 byte FIFO.
Note 3: The ECP Parallel Port Config Reg B reflects the IRQ and DRQ selected by the Configuration Registers.
6.7.6
This specification describes the standard interface to the Extended Capabilities Port (ECP). All LPC devices supporting
ECP must meet the requirements contained in this section or the port will not be supported by Microsoft. For a
description of the ECP Protocol, please refer to the IEEE 1284 Extended Capabilities Port Protocol and ISA Interface
Standard, Rev. 1.14, July 14, 1993. This document is available from Microsoft.
Description
SMSC DS – LPC47S45x
PeriphClk, nAck
HostAck, nAutoFd
PeriphAck, Busy
nPeriphRequest, nFault
nReverseRequest, nInit
nAckReverse, PError
Xflag, Select
ECPMode, nSelectln
HostClk, nStrobe
data
ecpAFifo
dsr
dcr
cFifo
ecpDFifo
tFifo
cnfgA
cnfgB
ecr
VOCABULARY
When a signal asserts it transitions to a "true" state, when a signal deasserts it transitions to a "false" state.
A high level.
A low level.
ECP IMPLEMENTATION STANDARD
EXTENDED CAPABILITIES PARALLEL PORT
A port word; equal in size to the width of the LPC interface. For this implementation, PWord is always 8 bits.
Addr/RLE
compress intrValue
nBusy
PD7
D7
0
0
MODE
nAck
PD6
D6
0
0
Direction
PError
PD5
D5
0
DATASHEET
Parallel Port IRQ
Parallel Port Data FIFO
nErrIntrEn
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ackIntEn
ECP Data FIFO
Select
PD4
D4
Test FIFO
1
Address or RLE field
SelectIn
dmaEn
nFault
PD3
D3
0
serviceIntr
PD2
nInit
D2
0
0
Parallel Port DMA
autofd
PD1
D1
full
0
0
strobe
empty
PD0
D0
0
0
Rev. 07/09/2001
Note
2
1
1
2
2
2