AN983 ETC [List of Unclassifed Manufacturers], AN983 Datasheet - Page 40

• Manufacturer Part Number: AN983
• Description: PCI/miniPCI-to-Ethernet LAN Controller
• Manufacturer: ETC [List of Unclassifed Manufacturers]

LH* = High Latching and cleared by writing 1.
CSR17 (offset = 84h), ACSR7- Assistant CSR7 (Interrupt enable register 2)
CSR18 (offset = 88h), CR - Command Register, bit31 to bit16
Automatically recall from EEPROM
15
14~0
Bit #
31
30
29
28
27
26
25~17
16
15
14~0
Bit #
31
30-28
27
26
Rev. 1.8
AAISS
Name
TEIE
REIE
LCIE
TDIE
---
PFRIE
---
ANISE
AAIE
Name
D3CS
AUXCL
PMEP
PMEPEN
Added Abnormal Interrupt Status Summary.
1: any of added abnormal interrupt happened.
These bits are the same as the status register of CSR5. You
can access those status bits through either CSR5 or CSR16.
Descriptions
Transmit Early Interrupt Enable
Receive Early Interrupt Enable
Link Status Change Interrupt Enable
Transmit Deferred Interrupt Enable
Reserved
PAUSE Frame Received Interrupt Enable
Reserved
Added Normal Interrupt Summary Enable.
1: adds the interrupts of bit 30 and 31 of ACSR7 to the
normal interrupt summary (bit 16 of CSR5).
Added Abnormal Interrupt Summary Enable.
1: adds the interrupt of bit 26, 28 and 29 of ACSR7 to the
abnormal interrupt summary.
These bits are the same as the interrupt enable register of
CSR7. You can access those interrupt enable bits through
either CSR7 or CSR16.
Descriptions
D3cold support, mapped to CR48<31>
Aux Current. These three bits report the maximum 3.3 Vaux
current requirements for AN983B. If bit 31 of PMR0 is ‘1’, the
default value is 0101b, means AN983B need 100 mA to
support remote wake-up in D3cold power state.
Actively type select
1: create a negative 50ms pulse
0: create a positive 50ms pulse
This bit is only active when PMEP enable CSR18 bit 26
PMEP pin enable
1: enable
0: disable (this pin will be input, to compatible with AN983
circuit)
AN983B
www.admtek.com.tw
ADMtek Inc.
PCI/miPCI Fast Ethernet Controller with integrated PHY
0
Default Val RW Type
0
0
0
0
0
0
0
Default Val
1
From
EEPROM
010b
From
EEPROM
0 from
EEPROM
0 from
EEPROM
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO/LH*
RO/LH*
RW
Type
R/W
RO
R/W
R/W
40