PEF20525 INFINEON [Infineon Technologies AG], PEF20525 Datasheet - Page 131
![no-image](/images/no-image-200.jpg)
PEF20525
Manufacturer Part Number
PEF20525
Description
2 Channel Serial Optimized Communication Controller for HDLC/PPP
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
1.PEF20525.pdf
(252 pages)
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Data Sheet
Register 17
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Register 18
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Bit
Bit
XREPE
7
7
0
Command Status
STARL
Status Register (Low Byte)
STARH
Status Register (High Byte)
6
6
updated by SEROCCO-H
0
updated by SEROCCO-H
0
read only
00
Channel A
12
read and evaluated by CPU
read only
10
Channel A
13
read and evaluated by CPU
H
H
H
H
Receiver Status
CD
5
5
0
Channel B
62
Channel B
63
H
H
CEC
RLI
5-131
4
4
DPLA
3
3
0
Register Description (STARL)
Transmitter Status
XDOV
WFA
2
2
Automode Status
XRNR
XFW
1
1
PEB 20525
PEF 20525
2000-09-14
RRNR
CTS
0
0
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