PEF20525 INFINEON [Infineon Technologies AG], PEF20525 Datasheet - Page 173

• Manufacturer Part Number: PEF20525
• Description: 2 Channel Serial Optimized Communication Controller for HDLC/PPP
• Manufacturer: INFINEON [Infineon Technologies AG]

Data Sheet
Register 50
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Register 51
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Bit
Bit
R07
R15
15
7
PCMRX0
PCM Mask Receive Direction Register 0
PCMRX1
PCM Mask Receive Direction Register 1
R06
R14
14
6
read/write
00
Channel A
34
written by CPU;
read and evaluated by SEROCCO-H
read/write
00
Channel A
35
written by CPU;
read and evaluated by SEROCCO-H
H
H
H
H
R05
R13
13
5
PCM Mask for Receive Direction
PCM Mask for Receive Direction
Channel B
84
Channel B
85
H
H
R04
R12
12
5-173
4
R03
R11
11
3
Register Description (PCMRX0)
R02
R10
10
2
R01
R09
1
9
PEB 20525
PEF 20525
2000-09-14
R00
R08
0
8