PMB2304 INFINEON [Infineon Technologies AG], PMB2304 Datasheet - Page 10

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PMB2304

Manufacturer Part Number
PMB2304
Description
PLL-FREQUENCY SYNTHESIZER
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet

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Wireless Components
3
4
5
6
7
EN
DA
CLK
V
MOD
DD
P in 3
E N
P in 4
D A
P in 5
C L K
E S D
E S D
E S D
ES D
5 6 0
5 6 0
5 6 0
2 p F
3 - 3
p in 7
M O D
3-Line Bus: Enable
Enable line of the serial control with inter-
nal pull-up resistor. When EN = H the
input signals CLK and DA are disabled
internally. When EN = L the serial control
is activated. The received data are trans-
ferred into the latches with the positive
edge of the EN-signal.
3-Line Bus: Data
Serial data input with internal pull-up
resistor. The last two bits before the EN-
signal define the destination address. In a
byte-oriented data structure the transmit-
ted data have to end with the EN-signal,
i.e. bits to be filled in (don’t care) are
transmitted first.
3-Line Bus: Clock
Clock line with internal pull-up resistor.
The serial data are read into the internal
shift register with the positive edge (see
pulse diagram for serial data control).
Positive supply voltage for serial control
logic.
Modulus Control Output for external
dual modulus prescaler. The modulus
output is low at the beginning of the cycle.
When the A-counter has reached its set
value, MOD switches to high. When the
N-counter has reached its set value,
MOD switches to low again, and the cycle
starts from the top. When the prescaler
has the counter factor P or P + 1 (P for
MOD = H, P + 1 for MOD = L), the overall
divider factor is NP + A. The value of the
A-counter must be smaller than that of
the N-counter. The trigger edge of the
modulus signal to the input signal can be
selected (see programming tables and
MODA, B) according to the needs of the
prescaler. In single modulus operation
and for standby operation in dual modu-
lus operation, the output is low.
Functional Description
Specification, June 2002
PMB 2304R
preliminary

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