NAND01G-A STMICROELECTRONICS [STMicroelectronics], NAND01G-A Datasheet - Page 19

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NAND01G-A

Manufacturer Part Number
NAND01G-A
Description
128 Mbit, 256 Mbit, 512 Mbit, 1 Gbit (x8/x16) 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
COMMAND SET
All bus write operations to the device are interpret-
ed by the Command Interface. The Commands
are input on I/O0-I/O7 and are latched on the rising
edge of Write Enable when the Command Latch
Enable signal is high. Device operations are se-
lected by writing specific commands to the Com-
Table 9. Commands
Note: 1. The bus cycles are only shown for issuing the codes. The cycles required to input the addresses or input/output data are not shown.
Read A
Read B
Read C
Read Electronic Signature
Read Status Register
Page Program
Copy Back Program
Block Erase
Reset
2. Any undefined command sequence will be ignored by the device.
Command
1
st
01h
NAND128-A, NAND256-A, NAND512-A, NAND01G-A
CYCLE
FFh
00h
50h
90h
70h
80h
00h
60h
(2)
Bus Write Operations
mand
sequences for program and erase operations are
imposed to maximize data security.
The Commands are summarized in
9.,
2
nd
Commands.
D0h
8Ah
10h
CYCLE
-
-
-
-
-
-
Register.
(1)
3
rd
CYCLE
10h
-
-
-
-
-
-
-
-
The
two-step
Command accepted
during busy
Yes
Yes
command
Table
19/57

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