M58LT128HSB8ZA6 NUMONYX [Numonyx B.V], M58LT128HSB8ZA6 Datasheet - Page 90

• Manufacturer Part Number: M58LT128HSB8ZA6
• Manufacturer: NUMONYX [Numonyx B.V]

Common Flash Interface
90/110
Table 40.
1. The variable P is a pointer which is defined at CFI offset 015h.
2. Bank regions. There are two bank regions, see
(P+42)h = 14Ch
(P+43)h = 14Dh
(P+3F)h = 149h
(P+40)h = 14Ah
(P+41)h = 14Bh
(P+44)h = 14Eh
(P+45)h = 14Fh
(P+46)h = 150h
(P+47)h = 151h
(P+48)h = 152h
(P+49)h = 153h
M58LT128HST (top)
Offset
Bank and Erase Block region 2 Information (continued)
Data
03h
03h
00h
80h
00h
64h
00h
01h
03h
(P+47)h = 151h
(P+48)h = 152h
(P+43)h = 153h
M58LT128HSB
Offset
(bottom)
Data
03h
Table 29
Bank region 2 (Erase Block type 1):Page mode
and Synchronous mode capabilities (defined in
Table
Bit 0: Page-mode reads permitted
Bit 1: Synchronous reads permitted
Bit 2: Synchronous writes permitted
Bits 3-7: reserved
Bank region 2 Erase Block type 2 Information
Bits 0-15: n+1 = number of same-size erase
blocks
Bits 16-31: n × 256 = number of bytes in Erase
Block region
Bank region 2 (Erase Block type 2)
Minimum Block Erase cycles × 1000
Bank region 2 (Erase Block type 2): BIts per cell,
internal ECC
Bits 0-3: bits per cell in Erase region
Bit 4: reserved for “internal ECC used”
BIts 5-7: reserved
Bank region 2 (Erase Block type 2): Page mode
and Synchronous mode capabilities (defined in
Table
Bit 0: Page-mode reads permitted
Bit 1: Synchronous reads permitted
Bit 2: Synchronous writes permitted
Bits 3-7: reserved
Feature Space definitions
Reserved
and
Table
37)
37)
30.
M58LT128HST, M58LT128HSB
Description