HYB18L128160BC-7.5 QIMONDA [Qimonda AG], HYB18L128160BC-7.5 Datasheet - Page 12

• Manufacturer Part Number: HYB18L128160BC-7.5
• Description: DRAMs for Mobile Applications 128-Mbit Mobile-RAM
• Manufacturer: QIMONDA [Qimonda AG]

2.2.1.6
Partial Array Self Refresh is a power-saving feature specific to Mobile RAMs. With PASR, self refresh may be
restricted to variable portions of the total array. The selection comprises all four banks, two banks, one bank, half
of one bank, and a quarter of one bank. Data written to the non activated memory sections will get lost after a
period defined by t
2.2.1.7
DRAM devices store data as electrical charge in tiny capacitors that require a periodic refresh in order to retain
the stored information. This refresh requirement heavily depends on the die temperature: high temperatures
correspond to short refresh periods, and low temperatures correspond to long refresh periods.
The Mobile-RAM is equipped with an on-chip temperature sensor which continuously senses the actual die
temperature and adjusts the refresh period in Self Refresh mode accordingly. This makes any programming of the
TCSR bits in the Extended Mode Register obsolete. It also is the superior solution in terms of compatibility and
power-saving, because
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•
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2.2.1.8
The drive strength of the DQ output buffers is selectable via bits A5 and A6 and shall be set load dependent. The
half drive strength is suitable for typical Mobile-RAM applications. The full drive strength is intended for heavier
loaded systems. I-V curves for full drive strength and half drive strength can be found in
2.3
Data Sheet
Field Bits
PAS
R
it is fully compatible to all processors that do not support the Extended Mode Register
it is fully compatible to all applications that only write a default (worst case) TCSR value, e.g. because of the
lack of an external temperature sensor
it does not require any processor interaction for regular TCSR updates
[2:0]
Partial Array Self Refresh (PASR)
Temperature Compensated Self Refresh (TCSR) with On-Chip Temperature
Sensor
Selectable Drive Strength
State Diagram
Type Description
w
REF
(cf.
Partial Array Self Refresh
000
001
010
101
110
Note: All other bit combinations are RESERVED.
Table
B
B
B
B
B
all banks (default)
1/2 array (BA1 = 0)
1/4 array (BA1 = BA0 = 0)
1/8 array (BA1 = BA0 = RA11 = 0)
1/16 array (BA1 = BA0 = RA11 = RA10 = 0)
14).
12
Functional DescriptionState Diagram
HY[B/E]18L128160B[C/F]-7.5
128-Mbit Mobile-RAM
Table
05282004-NZNK-8T0D
Rev. 1.71, 2007-01
24.