PXF4336V11 INFINEON [Infineon Technologies AG], PXF4336V11 Datasheet - Page 196
PXF4336V11
Manufacturer Part Number
PXF4336V11
Description
ABM Premium ATM Buf fer Manager
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
1.PXF4336V11.pdf
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7.2.3
Register 3
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Bit
Bit
•
First 16-bit word of an ATM cell.
The ABM-P does not interpret these bit fields, but copies them into ATM cells that are
inserted during AAL5 packet segmentation process. Inserted cells are forwarded to the
ABM-P like any cell received by the respective UTOPIA Interface. Thus the bit field
usage must comply to the selected LCI mapping mode in the particular application.
VPI(11:0)
or
GFC(3:0) |
VPI(7:0)
or
LCI(11:0)
Data Sheet
15
7
Cell Insertion/Extraction and AAL5 Control Registers
UA5TXHD0/DA5TXHD0
Upstream/Downstream AAL5 Transmit Header 0 Registers
14
The meaning of this bit field depends on the selected LCI mapping
mode in Register 126: MODE1 :
MODE1->LCIMOD(1:0):
’00’
’01’
’10’
’11’
6
VPI(3:0),
LCI(3:0),
LCI(3:0),
Read/Write
0000
UA5TXHD0 05
Written by CPU
VPI(3:0)
H
13
VPI(11:4) or GFC(3:0) | VPI(7:4),
VPI(11:4) or GFC(3:0) | VPI(7:4),
5
VPI Address translated mode: LCI(11:0)
VPI transparent mode:
• NNI cell format: 12-bit VPI field
• UNI cell format: 4-bit GFC field and 8-bit VPI field
VPI Address translated mode: LCI(11:0)
VPI transparent mode:
• NNI cell format: 12-bit VPI field
• UNI cell format: 4-bit GFC field and 8 bit VPI field
H
12
4
LCI(11:4),
LCI(11:4),
196
DA5TXHD0 15
11
3
10
2
VCI(15:12),
VCI(15:12),
LCI(15:12),
VCI(15:12)
Register Description
H
PXF 4336 V1.1
9
1
2001-12-17
ABM-P
8
0
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