PXF4336V11 INFINEON [Infineon Technologies AG], PXF4336V11 Datasheet - Page 414
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PXF4336V11
Manufacturer Part Number
PXF4336V11
Description
ABM Premium ATM Buf fer Manager
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
1.PXF4336V11.pdf
(425 pages)
- Current page: 414 of 425
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8.4.5
Timing of the Synchronous Dynamic RAM (SDRAM) Interface is simplified as all signals
are referenced to the rising edge of RAMCLK. In
signals output by the ABM-P have identical delay times with reference to the clock. When
reading from RAM, the ABM-P samples the data within a window at the rising clock edge.
Figure 8-9
Data Sheet
Table 8-14
No.
110
110A
111
112
113
114
115
CSRDATi(31:0), output
CSRRASi, CSRCASi,
CSRDATi(31:0), input
CSRBAi0, CSRBAi1
CSRCSi, CSRWEi,
Parameter
T
F
Setup time
CSRADRi(13:0), CSRCSi, CSRRASi, CSRCASi,
CSRWEi, CSRBAi0, CSRBAi1 before RAMCLK
rising
Hold time
CSRADRi(13:0), CSRCSi, CSRRASi, CSRCASi,
CSRWEi, CSRBAi0, CSRBAi1 after RAMCLK
rising
Delay CSRDATi Output after RAMCLK rising
Setup time CSRDATi Input before RAMCLK rising
(Read cycles)
Hold time CSRDATi Input after RAMCLK rising
(Read cycles)
CSRADRi(13:0),
RAMCLK
RAMCLK
CSR SDRAM Interface(s)
Generic SDRAM Interface Timing Diagram
SDRAM Interface AC Timing Characteristics
RAMCLK
: Period RAMCLK
: Frequency RAMCLK
414
Figure
111
114
110
Min
16.7
2.5
1.5
3
2.5
1.5
8-9, it can be seen that all
Electrical Characteristics
112
113
115
Limit Values
Typ
PXF 4336 V1.1
Max
60
6.5
2001-12-17
ABM-P
Unit
ns
MHz
ns
ns
ns
ns
ns
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