AT32UC3L064_11 ATMEL [ATMEL Corporation], AT32UC3L064_11 Datasheet - Page 99

• Manufacturer Part Number: AT32UC3L064_11
• Description: 32-bit Atmel AVR Microcontroller
• Manufacturer: ATMEL [ATMEL Corporation]

10.4.15
32099HS–12/2011
PWMA
6. TWIM SR.IDLE goes high immediately when NAK is received
7. TWIM TWALM polarity is wrong
8. TWIS CR.STREN does not work in deep sleep modes
9. TWI0.TWCK on PB05 is non-functional
10. TWIM Version Register reads zero
11. TWIS Version Register reads zero
1. PARAMETER register reads 0x2424
2. Writing to the duty cycle registers when the timebase counter overflows can give an
When a NAK is received and there is a non-zero number of bytes to be transmitted,
SR.IDLE goes high immediately and does not wait for the STOP condition to be sent. This
does not cause any problem just by itself, but can cause a problem if software waits for
SR.IDLE to go high and then immediately disables the TWIM by writing a one to CR.MDIS.
Disabling the TWIM causes the TWCK and TWD pins to go high immediately, so the STOP
condition will not be transmitted correctly.
Fix/Workaround
If possible, do not disable the TWIM. If it is absolutely necessary to disable the TWIM, there
must be a software delay of at least two TWCK periods between the detection of
SR.IDLE==1 and the disabling of the TWIM.
The TWALM signal in the TWIM is active high instead of active low.
Fix/Workaround
Use an external inverter to invert the signal going into the TWIM. When using both TWIM
and TWIS on the same pins, the TWALM cannot be used.
When the device is in Stop, DeepStop, or Static mode, address reception will not wake
device if both CR.SOAM and CR.STREN are one.
Fix/Workaround
Do not write both CR.STREN and CR.SOAM to one if the device needs to wake from deep
sleep modes.
TWI0.TWCK on PB05 is non-functional.
Fix/Workaround
Use TWI0.TWCK on other pins.
TWIM Version Register (VR) reads zero instead of 0x101
Fix/Workaround
None.
TWIS Version Register (VR) reads zero instead of 0x112
Fix/Workaround
None.
The PARAMETER register reads 0x2424 instead of 0x24.
Fix/Workaround
None.
undefined result
The duty cycle registers will be corrupted if written when the timebase counter overflows. If
the duty cycle registers are written exactly when the timebase counter overflows at TOP, the
duty cycle registers may become corrupted.
Fix/Workaround
AT32UC3L016/32/64
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