STM32F101X6_08 STMICROELECTRONICS [STMicroelectronics], STM32F101X6_08 Datasheet - Page 15

• Manufacturer Part Number: STM32F101X6_08
• Description: Access line, advanced ARM-based 32-bit MCU with Flash memory, six 16-bit timers, ADC and seven communication interfaces
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STM32F101xx
Figure 2.
1. When the HSI is used as a PLL clock input, the maximum system clock frequency that can be achieved is
2. To have an ADC conversion time of 1 µs, APB2 must be at 14 MHz or 28 MHz.
36 MHz.
OSC32_OUT
OSC32_IN
OSC_OUT
OSC_IN
MCO
Clock tree
4-16 MHz
32.768 kHz
HSE OSC
Main
Clock Output
LSE OSC
HSI RC
8 MHz
LSI RC
40 kHz
PLLSRC
MCO
x2, x3, x4
PLLMUL
HSI
..., x16
PLLXTPRE
PLL
/2
/128
LSE
/2
LSI
RTCSEL[1:0]
/2
HSE
PLLCLK
SYSCLK
HSI
PLLCLK
RTCCLK
to Independent Watchdog (IWDG)
HSI
HSE
CSS
SW
SYSCLK
36 MHz
max
to RTC
IWDGCLK
Prescaler
/1, 2..512
AHB
/1, 2, 4, 8, 16
/1, 2, 4, 8, 16
TIM2,3, 4
If (APB1 prescaler =1) x1
else
36 MHz max
/8
Prescaler
Prescaler
APB1
APB2
Clock
Enable (3 bits)
Legend:
HSE = high-speed external clock signal
HSI = high-speed internal clock signal
LSI = low-speed internal clock signal
LSE = low-speed external clock signal
36 MHz max
36 MHz max
Peripheral Clock
Prescaler
/2, 4, 6, 8
Peripheral Clock
Enable (13 bits)
Enable (11 bits)
ADC
x2
HCLK
to AHB bus, core,
memory and DMA
FCLK Cortex
free running clock
to Cortex System timer
Peripheral Clock
Enable (3 bits)
Description
ADCCLK
TIMXCLK
PCLK1
PCLK2
to APB1
peripherals
to APB2
peripherals
to TIM2, 3
and 4
ai15104
to ADC
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