STM32F101X6_08 STMICROELECTRONICS [STMicroelectronics], STM32F101X6_08 Datasheet - Page 49

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STM32F101X6_08

Manufacturer Part Number
STM32F101X6_08
Description
Access line, advanced ARM-based 32-bit MCU with Flash memory, six 16-bit timers, ADC and seven communication interfaces
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
STM32F101xx
Output driving current
The GPIOs (general purpose input/outputs) can sink or source up to +/-8 mA, and sink
+20 mA (with a relaxed V
In the user application, the number of I/O pins which can drive current must be limited to
respect the absolute maximum rating specified in
Output voltage levels
Unless otherwise specified, the parameters given in
performed under ambient temperature and V
Table
Table 34.
1. The I
2. The I
3. Based on characterization data, not tested in production.
Symbol
V
V
V
V
V
V
V
V
OH
OH
OH
OH
OL
OL
OL
OL
and the sum of I
Table 5
The sum of the currents sourced by all the I/Os on V
consumption of the MCU sourced on V
I
The sum of the currents sunk by all the I/Os on V
consumption of the MCU sunk on V
I
(1)
(1)
(1)
(1)
VDD
VSS
(2)
(2)
(2)
(2)
7. All I/Os are CMOS and TTL compliant.
IO
IO
current sunk by the device must always respect the absolute maximum rating specified in
current sourced by the device must always respect the absolute maximum rating specified in
(see
and the sum of I
(see
Output Low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output High level voltage for an I/O pin
when 8 pins are sourced at the same time
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
Output low level voltage for an I/O pin
when 8 pins are sunk at the same time
Output high level voltage for an I/O pin
when 8 pins are sourced at the same time
Output voltage characteristics
Table
Table
IO
(I/O ports and control pins) must not exceed I
5).
5).
IO
Parameter
(I/O ports and control pins) must not exceed I
OL
).
SS
DD,
cannot exceed the absolute maximum rating
DD
cannot exceed the absolute maximum rating
supply voltage conditions summarized in
2.7 V < V
2.7 V < V
2.7 V < V
Section
2 V < V
I
IO
I
Table 34
IO
I
Conditions
I
CMOS port
IO
IO
TTL port,
SS
= +20 mA
= +6 mA
VSS
= +8 mA,
= +8 mA
DD
plus the maximum Run
DD,
.
DD
DD
DD
5.2:
< 2.7 V
< 3.6 V
< 3.6 V
< 3.6 V
plus the maximum Run
VDD
are derived from tests
(3)
(3)
.
Electrical characteristics
V
V
V
DD
DD
DD
Min
2.4
–0.4
–1.3
–0.4
Max
0.4
0.4
1.3
0.4
Table 5
Unit
49/74
V
V
V
V

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