AT83EC5123 ATMEL Corporation, AT83EC5123 Datasheet - Page 112

• Manufacturer Part Number: AT83EC5123
• Description: (AT8xx512x) Smart Card Reader ICs
• Manufacturer: ATMEL Corporation

Mode 3 (Two 8-bit Timers)
Figure 77. Timer/Counter 0 in Mode 3: Two 8-bit Counters
Figure 78. Mode 3 Overflow Period Formula
Timer 1
112
INT0#
AT8xC5122/23
FCK_T0
FCK_T0
T0
TMOD.3
GATE0
/6
/6
TF0
TMOD.2
C/T0#
Mode 3 configures Timer 0 so that registers TL0 and TH0 operate as 8-bit Timers (see
Figure 77). This mode is provided for applications requiring an additional 8-bit Timer or
Counter. TL0 uses the Timer 0 control bits C/T0# and GATE0 in the TMOD register, and
TR0 and TF0 in the TCON register in the normal manner. TH0 is locked into a Timer
function (counting F
trol (TR1) bits. Thus, operation of Timer 1 is restricted when Timer 0 is in mode 3.
Figure 78 gives the autoreload period calculation formulas for both TF0 and TF1 flags.
Timer 1 is identical to Timer 0 except for Mode 3 which is a hold-count mode. The fol-
lowing comments help to understand the differences:
•
•
•
•
•
0
1
PER
TCON.4
=
Timer 1 functions as either a Timer or an event Counter in three operating modes.
Figure 71 through Figure 75 show the logical configuration for modes 0, 1, and 2.
Mode 3 of Timer 1 is a hold-count mode.
Timer 1 is controlled by the four high-order bits of the TMOD register (see Table 83
on page 115) and bits 2, 3, 6 and 7 of the TCON register (see Table 82 on page
114). The TMOD register selects the method of Timer gating (GATE1), Timer or
Counter operation (C/T1#) and the operating mode (M11 and M01). The TCON
register provides Timer 1 control functions: overflow flag (TF1), run control bit (TR1),
interrupt flag (IE1) and the interrupt type control bit (IT1).
Timer 1 can serve as the Baud Rate Generator for the Serial Port. Mode 2 is best
suited for this purpose.
For normal Timer operation (GATE1 = 0), setting TR1 allows TL1 to be incremented
by the selected input. Setting GATE1 and TR1 allows external pin INT1# to control
Timer operation.
Timer 1 overflow (count rolls over from all 1s to all 0s) sets the TF1 flag and
generates an interrupt request.
TR0
6 (256 – TL0)
F
TCON.6
CK_T0
TR1
UART
) and takes over use of the Timer 1 interrupt (TF1) and run con-
(8 bits)
(8 bits)
TF1
TH0
TL0
PER
=
6 (256 – TH0)
Overflow
Overflow
F
CK_T0
TCON.5
TCON.7
TF0
TF1
Timer 0
Interrupt
Request
Timer 1
Interrupt
Request
4202B–SCR–07/03