ZL50015GAC ZARLINK [Zarlink Semiconductor Inc], ZL50015GAC Datasheet

ZL50015GAC

Manufacturer Part Number

ZL50015GAC

Description

Enhanced 1 K Digital Switch with Stratum 4E DPLL

Manufacturer

ZARLINK [Zarlink Semiconductor Inc]

Datasheet

1.ZL50015GAC.pdf (122 pages)

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

ZL50015GAC

Manufacturer:

ZARLINK

Quantity:

Current page: 1 of 122
Download datasheet (917Kb)

MODE_4M1

MODE_4M0

REF_FAIL0

REF_FAIL1

REF_FAIL2

REF_FAIL3

Features

•

STi[15:0]

OSC_EN

1024 channel x 1024 channel non-blocking digital

Time Division Multiplex (TDM) switch at 4.096,

8.192 and 16.384 Mbps or using a combination of

ports running at 2.048, 4.096, 8.192 and

16.384 Mbps

16 serial TDM input, 16 serial TDM output

streams

Integrated Digital Phase-Locked Loop (DPLL)

exceeds Telcordia GR-1244-CORE Stratum 4E

specifications

Output clocks have less than 1 ns of jitter (except

for the 1.544 MHz output)

DPLL provides holdover, freerun and jitter

attenuation features with four independent

reference source inputs

Exceptional input clock cycle to cycle variation

tolerance (20 ns for all rates)

REF3

REF0

REF1

REF2

FPi

CKi

DD_CORE

Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

Zarlink Semiconductor US Patent No. 5,602,884, UK Patent No. 0772912,

S/P Converter

Input Timing

France Brevete S.G.D.G. 0772912; Germany DBP No. 69502724.7-08

OSC

DPLL

DD_IO

Figure 1 - ZL50015 Functional Block Diagram

DD_COREA

Microprocessor Interface

Zarlink Semiconductor Inc.

Internal Registers &

Connection Memory

Data Memory

DD_IOA

•

Output streams can be configured as bi-

directional for connection to backplanes

Per-stream input and output data rate conversion

selection at 2.048 Mbps, 4.096 Mbps, 8.192 Mbps

or 16.384 Mbps. Input and output data rates can

differ

Per-stream high impedance control outputs

(STOHZ) for 8 output streams

Enhanced 1 K Digital Switch with

ZL50015GAC

ZL50015QCC

ZL50015QCC1

ZL50015GAG2

RESET

**Pb Free Tin/SilverCopper

P/S Converter

Output Timing

*Pb Free Matte Tin

Test Port

Output HiZ

Ordering Information

-40°C to +85°C

Control

ODE

256 Ball PBGA

256 Lead LQFP

256 Lead LQFP*

256 Ball PBGA**

Stratum 4E DPLL

Data Sheet

STio[15:0]

STOHZ[7:0]

FPo[3:0]

CKo[5:0]

FPo_OFF[2:0]

ZL50015

Trays

January 2006

Related parts for ZL50015GAC

Related keywords

ZL50015GAC datasheet
ZL50015GAC data sheet
ZL50015GAC pdf datasheet
ZL50015GAC component
ZL50015GAC part
ZL50015GAC distributor
ZL50015GAC RoHS
ZL50015GAC datasheet download