ZL50015GAC ZARLINK [Zarlink Semiconductor Inc], ZL50015GAC Datasheet - Page 75

• Manufacturer Part Number: ZL50015GAC
• Description: Enhanced 1 K Digital Switch with Stratum 4E DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

MML
External Read/Write Address: 006A
Reset Value: 0000
FML
External Read Only Address: 0069
15
R3
15
R3
Bit
Bit
15
14
13
4
3
2
1
0
MMU
FMU
14
R3
14
R3
Table 39 - Reference Failure Status Register (RSR) Bits - Read Only (continued)
R3MMU
R3MML
R0FMU
R0FML
Name
Name
R3ML
R1FU
R0FU
R0FL
13
R3
ML
13
R3
FL
H
MU
12
R3
12
R3
FU
Reference 1 Single Period Upper Limit Fail Bit
If the device sets this bit to high, the input REF1 fails the single-period upper limit
check. (See Table 11, “Values for Single Period Limits” on page 45)
Reference 0 Multi-period Lower Limit Fail Bit
If the device sets this bit to high, the input REF0 fails the multi-period lower limit check.
(See Table 12, “Multi-Period Hysteresis Limits” on page 45)
Reference 0 Multi-period Upper Limit Fail Bit
If the device sets this bit to high, the input REF0 fails the multi-period upper limit
check. (See Table 12, “Multi-Period Hysteresis Limits” on page 45)
Reference 0 Single Period Lower Limit Fail Bit
If the device sets this bit to high, the input REF0 fails the single-period lower limit
check. (See Table 11, “Values for Single Period Limits” on page 45)
Reference 0 Single Period Upper Limit Fail Bit
If the device sets this bit to high, the input REF0 fails the single-period upper limit
check. (See Table 11, “Values for Single Period Limits” on page 45)
Reference 3 Multi-period Lower Limit Mask Bit
When this bit is high, it masks the multi-period lower limit check (or forces pass) for
REF3.
Reference 3 Multi-period Upper Limit Mask Bit
When this bit is high, it masks the multi-period upper limit check (or forces pass) for
REF3.
Reference 3 Single-period Lower Limit Mask Bit
When this bit is high, it masks the single-period lower limit check (or forces pass) for
REF3.
MML
H
FML
R2
H
11
Table 40 - Reference Mask Register (RMR) Bits
11
R2
MMU
FMU
10
R2
10
R2
R2
ML
R2
FL
9
9
Zarlink Semiconductor Inc.
ZL50015
MU
R2
R2
FU
8
8
75
MML
FML
R1
R1
7
7
Description
Description
MMU
FMU
R1
R1
6
6
ML
R1
R1
FL
5
5
MU
R1
R1
FU
4
4
MML
FML
R0
R0
3
3
MMU
FMU
R0
R0
2
2
Data Sheet
ML
R0
R0
FL
1
1
MU
R0
R0
FU
0
0