ZL50015GAC ZARLINK [Zarlink Semiconductor Inc], ZL50015GAC Datasheet - Page 97

• Manufacturer Part Number: ZL50015GAC
• Description: Enhanced 1 K Digital Switch with Stratum 4E DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

† Characteristics are over recommended operating conditions unless otherwise stated.
AC Electrical Characteristics
Note 1:
Note 2:
10 Acknowledgement delay time.
12 RDY drive low to HiZ
11 Acknowledgement hold time.
1
2
3
4
5
6
7
8
9
CS
WR
RD
A0-A13
D0-D15
RDY
CS de-asserted time
WR setup to CS falling
RD setup to CS falling
Address setup to CS falling
Data setup to CS falling
WR hold after CS rising
RD hold after CS rising
Address hold after CS rising
Data hold after CS rising
From CS low to RDY high:
From CS high to RDY low
Registers
Memory
High impedance is measured by pulling to the appropriate rail with R
A delay of 500 µs to 2 ms (Section 17.2 on page 46) must be applied before the first microprocessor access is performed
discharge C
after the RESET pin is set high.
Characteristics
L
.
Figure 29 - Intel Non-Multiplexed Bus Timing - Write Access
†
- Intel Non-Multiplexed Bus Mode - Write Access
t
CSD
Sym.
t
t
t
t
t
t
CSD
t
t
t
t
t
Zarlink Semiconductor Inc.
t
AKD
AKH
AKZ
WS
WH
RS
AS
DS
RH
AH
DH
t
t
t
WS
AS
RS
ZL50015
Min.
15
10
10
10
97
5
0
0
0
5
4
t
DS
Typ.
VALID ADDRESS
t
AKD
VALID WRITE DATA
L
, with timing corrected to cancel time taken to
Max.
150
55
12
8
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
t
AH
AKH
t
DH
C
C
(Note 1)
C
C
C
(Note 1)
t
t
WH
RH
L
L
L
L
L
Test Conditions
t
= 50 pF
= 50 pF, R
= 50 pF
= 50 pF
= 50 pF, R
AKZ
Data Sheet
V
V
V
V
V
V
CT
CT
CT
CT
L
L
CT
CT
= 1 K
= 1 K
2