ZL50015GAC ZARLINK [Zarlink Semiconductor Inc], ZL50015GAC Datasheet - Page 72

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ZL50015GAC

Manufacturer Part Number
ZL50015GAC
Description
Enhanced 1 K Digital Switch with Stratum 4E DPLL
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet

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Quantity
Price
Part Number:
ZL50015GAC
Manufacturer:
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Quantity:
37
Note 1:
Note 2:
1 - 0
15 - 4
External Read Only Address: 0066
External Read Only Address: 004C
Bit
15
15
0
0
Bit
3
2
1
0
If any of these bits are set, the interrupt output will become active unless the Interrupt Mask Register (IMR) has a high
value for that particular bit.
Any of these bits can be cleared by setting the appropriate bit in the Interrupt Clear Register.
14
14
0
0
DPM1 - 0
Table 35 - Reference Change Status Register (RCSR) Bits - Read Only (continued)
Name
Unused
Unused
Name
HOI
RCI
LCI
13
13
0
0
DPLL Timing Mode Status Bits: These bits indicate the DPLL’s timing mode status.
12
12
0
0
Reserved
In normal functional mode, these bits is zero.
Lock Change Interrupt Bit
If the device sets this bit to high, the device lock status has changed.
Reference Change Interrupt Bit
If the device sets this bit to high, the selected reference has changed.
Holdover Interrupt Bit
If the device sets this bit to high, the device has entered or recovered from the
holdover/MTIE mode.
Reserved
In normal functional mode, this bit is zero.
Table 36 - Interrupt Register (IR) Bits - Read Only
H
H
11
11
0
0
10
10
0
0
DPM1
0
0
1
1
9
0
9
0
Zarlink Semiconductor Inc.
ZL50015
SLM
8
DPM0
8
0
0
1
0
1
72
LST
7
7
0
DPLL
Description
Description
RFR2
6
6
0
Timing Mode State
Holdover
Freerun
Normal
MTIE
RFR1
5
5
0
RFR0
4
4
0
RES1
LCI
3
3
RES0
RCI
2
2
DPM1
Data Sheet
HOI
1
1
DPM0
0
0
0

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