ZL50015GAC ZARLINK [Zarlink Semiconductor Inc], ZL50015GAC Datasheet - Page 82

• Manufacturer Part Number: ZL50015GAC
• Description: Enhanced 1 K Digital Switch with Stratum 4E DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Note: [n] denotes input stream from 0 - 15.
External Read/Write Address: 0120
Reset Value: 0000
15
5 - 3
2 - 0
0
Bit
14
0
Table 44 - Stream Input Quadrant Frame Register 0 - 15 (SIQFR0 - 15) Bits (continued)
13
0
STIN[n]Q1C2 - 0
STIN[n]Q0C2 - 0
H
12
0
Name
STIN[n]
Q3C2
11
H
STIN[n]
- 012F
Q3C1
10
Quadrant Frame 1 Control Bits
these three bits are used to control STi[n]’s quadrant frame 1, which is defined
as Ch8 to 15, Ch16 to 31, Ch32 to 63 and Ch64 to 127 for the 2.048 Mbps,
4.096 Mbps, 8.192 Mbps, and 16.384 Mbps modes respectively.
Quadrant Frame 0 Control Bits
These three bits are used to control STi[n]’s quadrant frame 0, which is defined
as Ch0 to 7, Ch0 to 15, Ch0 to 31 and Ch0 to 63 for the 2.048 Mbps,
4.096 Mbps, 8.192 Mbps, and 16.384 Mbps modes respectively.
H
STIN[n]
Q3C0
9
STIN[n]
Q2C2
Zarlink Semiconductor Inc.
8
STIN[n]Q1C
STIN[n]Q0C
ZL50015
100
101
0xx
110
111
2-0
STIN[n]
Q2C1
0xx
100
101
110
2-0
111
7
82
STIN[n]
Q2C0
6
MSB of each channel is replaced by “0”
MSB of each channel is replaced by “1”
LSB of each channel is replaced by “0”
LSB of each channel is replaced by “1”
MSB of each channel is replaced by “0”
MSB of each channel is replaced by “1”
LSB of each channel is replaced by “0”
LSB of each channel is replaced by “1”
STIN[n]
Description
Q1C2
5
normal operation
normal operation
STIN[n]
Q1C1
4
Operation
Operation
STIN[n]
Q1C0
3
STIN[n]
Q0C2
2
STIN[n]
Q0C1
1
Data Sheet
STIN[n]
Q0C0
0